Lines Matching refs:pdata
389 static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata);
391 static int xgbe_phy_i2c_xfer(struct xgbe_prv_data *pdata,
394 return pdata->i2c_if.i2c_xfer(pdata, i2c_op);
397 static int xgbe_phy_redrv_write(struct xgbe_prv_data *pdata, unsigned int reg,
400 struct xgbe_phy_data *phy_data = pdata->phy_data;
428 ret = xgbe_phy_i2c_xfer(pdata, &i2c_op);
442 ret = xgbe_phy_i2c_xfer(pdata, &i2c_op);
451 netif_dbg(pdata, drv, pdata->netdev,
459 static int xgbe_phy_i2c_write(struct xgbe_prv_data *pdata, unsigned int target,
472 ret = xgbe_phy_i2c_xfer(pdata, &i2c_op);
479 static int xgbe_phy_i2c_read(struct xgbe_prv_data *pdata, unsigned int target,
493 ret = xgbe_phy_i2c_xfer(pdata, &i2c_op);
508 ret = xgbe_phy_i2c_xfer(pdata, &i2c_op);
515 static int xgbe_phy_sfp_put_mux(struct xgbe_prv_data *pdata)
517 struct xgbe_phy_data *phy_data = pdata->phy_data;
531 return xgbe_phy_i2c_xfer(pdata, &i2c_op);
534 static int xgbe_phy_sfp_get_mux(struct xgbe_prv_data *pdata)
536 struct xgbe_phy_data *phy_data = pdata->phy_data;
550 return xgbe_phy_i2c_xfer(pdata, &i2c_op);
553 static void xgbe_phy_put_comm_ownership(struct xgbe_prv_data *pdata)
558 static int xgbe_phy_get_comm_ownership(struct xgbe_prv_data *pdata)
560 struct xgbe_phy_data *phy_data = pdata->phy_data;
571 XP_IOWRITE(pdata, XP_I2C_MUTEX, XGBE_MUTEX_RELEASE);
572 XP_IOWRITE(pdata, XP_MDIO_MUTEX, XGBE_MUTEX_RELEASE);
582 if (XP_IOREAD(pdata, XP_I2C_MUTEX) ||
583 XP_IOREAD(pdata, XP_MDIO_MUTEX)) {
589 XP_IOWRITE(pdata, XP_I2C_MUTEX, mutex_id);
590 XP_IOWRITE(pdata, XP_MDIO_MUTEX, mutex_id);
597 netdev_err(pdata->netdev, "unable to obtain hardware mutexes\n");
602 static int xgbe_phy_mdio_mii_write(struct xgbe_prv_data *pdata, int addr,
605 struct xgbe_phy_data *phy_data = pdata->phy_data;
615 return pdata->hw_if.write_ext_mii_regs(pdata, addr, reg, val);
618 static int xgbe_phy_i2c_mii_write(struct xgbe_prv_data *pdata, int reg, u16 val)
624 ret = xgbe_phy_sfp_get_mux(pdata);
632 ret = xgbe_phy_i2c_write(pdata, XGBE_SFP_PHY_ADDRESS,
635 xgbe_phy_sfp_put_mux(pdata);
642 struct xgbe_prv_data *pdata = mii->priv;
643 struct xgbe_phy_data *phy_data = pdata->phy_data;
646 ret = xgbe_phy_get_comm_ownership(pdata);
651 ret = xgbe_phy_i2c_mii_write(pdata, reg, val);
653 ret = xgbe_phy_mdio_mii_write(pdata, addr, reg, val);
657 xgbe_phy_put_comm_ownership(pdata);
662 static int xgbe_phy_mdio_mii_read(struct xgbe_prv_data *pdata, int addr,
665 struct xgbe_phy_data *phy_data = pdata->phy_data;
675 return pdata->hw_if.read_ext_mii_regs(pdata, addr, reg);
678 static int xgbe_phy_i2c_mii_read(struct xgbe_prv_data *pdata, int reg)
684 ret = xgbe_phy_sfp_get_mux(pdata);
689 ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_PHY_ADDRESS,
695 xgbe_phy_sfp_put_mux(pdata);
702 struct xgbe_prv_data *pdata = mii->priv;
703 struct xgbe_phy_data *phy_data = pdata->phy_data;
706 ret = xgbe_phy_get_comm_ownership(pdata);
711 ret = xgbe_phy_i2c_mii_read(pdata, reg);
713 ret = xgbe_phy_mdio_mii_read(pdata, addr, reg);
717 xgbe_phy_put_comm_ownership(pdata);
722 static void xgbe_phy_sfp_phy_settings(struct xgbe_prv_data *pdata)
724 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
725 struct xgbe_phy_data *phy_data = pdata->phy_data;
733 pdata->phy.speed = SPEED_UNKNOWN;
734 pdata->phy.duplex = DUPLEX_UNKNOWN;
735 pdata->phy.autoneg = AUTONEG_ENABLE;
736 pdata->phy.pause_autoneg = AUTONEG_ENABLE;
754 pdata->phy.speed = SPEED_UNKNOWN;
755 pdata->phy.duplex = DUPLEX_UNKNOWN;
756 pdata->phy.autoneg = AUTONEG_ENABLE;
757 pdata->phy.pause_autoneg = AUTONEG_ENABLE;
776 pdata->phy.speed = SPEED_10000;
777 pdata->phy.duplex = DUPLEX_FULL;
778 pdata->phy.autoneg = AUTONEG_DISABLE;
779 pdata->phy.pause_autoneg = AUTONEG_DISABLE;
803 pdata->phy.speed = SPEED_UNKNOWN;
804 pdata->phy.duplex = DUPLEX_UNKNOWN;
805 pdata->phy.autoneg = AUTONEG_DISABLE;
806 pdata->phy.pause_autoneg = AUTONEG_DISABLE;
845 static void xgbe_phy_free_phy_device(struct xgbe_prv_data *pdata)
847 struct xgbe_phy_data *phy_data = pdata->phy_data;
857 static bool xgbe_phy_finisar_phy_quirks(struct xgbe_prv_data *pdata)
860 struct xgbe_phy_data *phy_data = pdata->phy_data;
892 netif_dbg(pdata, drv, pdata->netdev,
898 static bool xgbe_phy_belfuse_phy_quirks(struct xgbe_prv_data *pdata)
901 struct xgbe_phy_data *phy_data = pdata->phy_data;
914 pdata->an_again = 1;
973 netif_dbg(pdata, drv, pdata->netdev,
979 static void xgbe_phy_external_phy_quirks(struct xgbe_prv_data *pdata)
981 if (xgbe_phy_belfuse_phy_quirks(pdata))
984 if (xgbe_phy_finisar_phy_quirks(pdata))
988 static int xgbe_phy_find_phy_device(struct xgbe_prv_data *pdata)
990 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
991 struct xgbe_phy_data *phy_data = pdata->phy_data;
1000 pdata->an_again = 0;
1012 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr,
1015 netdev_err(pdata->netdev,
1025 netdev_err(pdata->netdev, "get_phy_device failed\n");
1028 netif_dbg(pdata, drv, pdata->netdev, "external PHY id is %#010x\n",
1035 netdev_err(pdata->netdev, "phy_device_register failed\n");
1040 ret = phy_attach_direct(pdata->netdev, phydev, phydev->dev_flags,
1043 netdev_err(pdata->netdev, "phy_attach_direct failed\n");
1050 xgbe_phy_external_phy_quirks(pdata);
1060 static void xgbe_phy_sfp_external_phy(struct xgbe_prv_data *pdata)
1062 struct xgbe_phy_data *phy_data = pdata->phy_data;
1074 ret = xgbe_phy_i2c_mii_read(pdata, MII_BMCR);
1125 static void xgbe_phy_sfp_parse_eeprom(struct xgbe_prv_data *pdata)
1127 struct xgbe_phy_data *phy_data = pdata->phy_data;
1195 static void xgbe_phy_sfp_eeprom_info(struct xgbe_prv_data *pdata,
1201 netif_dbg(pdata, drv, pdata->netdev, "SFP detected:\n");
1205 netif_dbg(pdata, drv, pdata->netdev, " vendor: %s\n",
1211 netif_dbg(pdata, drv, pdata->netdev, " part number: %s\n",
1217 netif_dbg(pdata, drv, pdata->netdev, " revision level: %s\n",
1223 netif_dbg(pdata, drv, pdata->netdev, " serial number: %s\n",
1237 static int xgbe_phy_sfp_read_eeprom(struct xgbe_prv_data *pdata)
1239 struct xgbe_phy_data *phy_data = pdata->phy_data;
1244 ret = xgbe_phy_sfp_get_mux(pdata);
1246 dev_err_once(pdata->dev, "%s: I2C error setting SFP MUX\n",
1247 netdev_name(pdata->netdev));
1253 ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_SERIAL_ID_ADDRESS,
1257 dev_err_once(pdata->dev, "%s: I2C error reading SFP EEPROM\n",
1258 netdev_name(pdata->netdev));
1281 if (netif_msg_drv(pdata))
1282 xgbe_phy_sfp_eeprom_info(pdata, &sfp_eeprom);
1286 xgbe_phy_free_phy_device(pdata);
1292 xgbe_phy_sfp_put_mux(pdata);
1297 static void xgbe_phy_sfp_signals(struct xgbe_prv_data *pdata)
1299 struct xgbe_phy_data *phy_data = pdata->phy_data;
1305 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address,
1309 dev_err_once(pdata->dev, "%s: I2C error reading SFP GPIOs\n",
1310 netdev_name(pdata->netdev));
1319 static void xgbe_phy_sfp_mod_absent(struct xgbe_prv_data *pdata)
1321 struct xgbe_phy_data *phy_data = pdata->phy_data;
1323 xgbe_phy_free_phy_device(pdata);
1340 static void xgbe_phy_sfp_detect(struct xgbe_prv_data *pdata)
1342 struct xgbe_phy_data *phy_data = pdata->phy_data;
1348 ret = xgbe_phy_get_comm_ownership(pdata);
1353 xgbe_phy_sfp_signals(pdata);
1355 xgbe_phy_sfp_mod_absent(pdata);
1359 ret = xgbe_phy_sfp_read_eeprom(pdata);
1363 xgbe_phy_sfp_mod_absent(pdata);
1367 xgbe_phy_sfp_parse_eeprom(pdata);
1369 xgbe_phy_sfp_external_phy(pdata);
1372 xgbe_phy_sfp_phy_settings(pdata);
1374 xgbe_phy_put_comm_ownership(pdata);
1377 static int xgbe_phy_module_eeprom(struct xgbe_prv_data *pdata,
1380 struct xgbe_phy_data *phy_data = pdata->phy_data;
1403 if (!netif_running(pdata->netdev)) {
1413 ret = xgbe_phy_get_comm_ownership(pdata);
1419 ret = xgbe_phy_sfp_get_mux(pdata);
1421 netdev_err(pdata->netdev, "I2C error setting SFP MUX\n");
1428 ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_SERIAL_ID_ADDRESS,
1432 netdev_err(pdata->netdev,
1443 ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_DIAG_INFO_ADDRESS,
1448 netdev_err(pdata->netdev,
1465 xgbe_phy_sfp_put_mux(pdata);
1468 xgbe_phy_put_comm_ownership(pdata);
1476 static int xgbe_phy_module_info(struct xgbe_prv_data *pdata,
1479 struct xgbe_phy_data *phy_data = pdata->phy_data;
1484 if (!netif_running(pdata->netdev))
1501 static void xgbe_phy_phydev_flowctrl(struct xgbe_prv_data *pdata)
1503 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1504 struct xgbe_phy_data *phy_data = pdata->phy_data;
1508 pdata->phy.tx_pause = 0;
1509 pdata->phy.rx_pause = 0;
1527 pdata->phy.tx_pause = 1;
1529 pdata->phy.rx_pause = 1;
1532 static enum xgbe_mode xgbe_phy_an37_sgmii_outcome(struct xgbe_prv_data *pdata)
1534 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1541 if (pdata->phy.pause_autoneg)
1542 xgbe_phy_phydev_flowctrl(pdata);
1544 switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) {
1546 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) {
1556 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) {
1572 static enum xgbe_mode xgbe_phy_an37_outcome(struct xgbe_prv_data *pdata)
1574 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1582 ad_reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE);
1583 lp_reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_LP_ABILITY);
1589 if (pdata->phy.pause_autoneg) {
1591 pdata->phy.tx_pause = 0;
1592 pdata->phy.rx_pause = 0;
1595 pdata->phy.tx_pause = 1;
1596 pdata->phy.rx_pause = 1;
1599 pdata->phy.rx_pause = 1;
1601 pdata->phy.tx_pause = 1;
1615 static enum xgbe_mode xgbe_phy_an73_redrv_outcome(struct xgbe_prv_data *pdata)
1617 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1618 struct xgbe_phy_data *phy_data = pdata->phy_data;
1626 if (pdata->phy.pause_autoneg)
1627 xgbe_phy_phydev_flowctrl(pdata);
1630 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);
1631 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);
1687 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
1688 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);
1695 static enum xgbe_mode xgbe_phy_an73_outcome(struct xgbe_prv_data *pdata)
1697 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1705 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
1706 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA);
1712 if (pdata->phy.pause_autoneg) {
1714 pdata->phy.tx_pause = 0;
1715 pdata->phy.rx_pause = 0;
1718 pdata->phy.tx_pause = 1;
1719 pdata->phy.rx_pause = 1;
1722 pdata->phy.rx_pause = 1;
1724 pdata->phy.tx_pause = 1;
1729 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);
1730 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);
1745 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
1746 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);
1753 static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata)
1755 switch (pdata->an_mode) {
1757 return xgbe_phy_an73_outcome(pdata);
1759 return xgbe_phy_an73_redrv_outcome(pdata);
1761 return xgbe_phy_an37_outcome(pdata);
1763 return xgbe_phy_an37_sgmii_outcome(pdata);
1769 static void xgbe_phy_an_advertising(struct xgbe_prv_data *pdata,
1772 struct ethtool_link_ksettings *slks = &pdata->phy.lks;
1773 struct xgbe_phy_data *phy_data = pdata->phy_data;
1786 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE)
1831 static int xgbe_phy_an_config(struct xgbe_prv_data *pdata)
1833 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1834 struct xgbe_phy_data *phy_data = pdata->phy_data;
1837 ret = xgbe_phy_find_phy_device(pdata);
1844 phy_data->phydev->autoneg = pdata->phy.autoneg;
1849 if (pdata->phy.autoneg != AUTONEG_ENABLE) {
1850 phy_data->phydev->speed = pdata->phy.speed;
1851 phy_data->phydev->duplex = pdata->phy.duplex;
1873 static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata)
1875 struct xgbe_phy_data *phy_data = pdata->phy_data;
1904 static int xgbe_phy_set_redrv_mode_mdio(struct xgbe_prv_data *pdata,
1907 struct xgbe_phy_data *phy_data = pdata->phy_data;
1913 return pdata->hw_if.write_ext_mii_regs(pdata, phy_data->redrv_addr,
1917 static int xgbe_phy_set_redrv_mode_i2c(struct xgbe_prv_data *pdata,
1920 struct xgbe_phy_data *phy_data = pdata->phy_data;
1927 ret = xgbe_phy_redrv_write(pdata, redrv_reg, mode);
1932 static void xgbe_phy_set_redrv_mode(struct xgbe_prv_data *pdata)
1934 struct xgbe_phy_data *phy_data = pdata->phy_data;
1947 ret = xgbe_phy_get_comm_ownership(pdata);
1952 xgbe_phy_set_redrv_mode_i2c(pdata, mode);
1954 xgbe_phy_set_redrv_mode_mdio(pdata, mode);
1956 xgbe_phy_put_comm_ownership(pdata);
1959 static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata)
1963 reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PCS, MDIO_PCS_DIGITAL_STAT,
1970 XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_CTRL1,
1973 XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_CTRL1,
1976 netif_err(pdata, link, pdata->netdev, "firmware mailbox reset performed\n");
1980 static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable)
1982 XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0,
1991 static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,
1998 xgbe_phy_pll_ctrl(pdata, false);
2001 if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) {
2002 netif_dbg(pdata, link, pdata->netdev,
2004 xgbe_phy_rx_reset(pdata);
2012 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
2013 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
2014 XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
2019 if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))
2025 netif_dbg(pdata, link, pdata->netdev,
2029 xgbe_phy_rx_reset(pdata);
2033 xgbe_phy_pll_ctrl(pdata, true);
2036 static void xgbe_phy_rrc(struct xgbe_prv_data *pdata)
2039 xgbe_phy_perform_ratechange(pdata, 5, 0);
2041 netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n");
2044 static void xgbe_phy_power_off(struct xgbe_prv_data *pdata)
2046 struct xgbe_phy_data *phy_data = pdata->phy_data;
2049 xgbe_phy_perform_ratechange(pdata, 0, 0);
2053 netif_dbg(pdata, link, pdata->netdev, "phy powered off\n");
2056 static void xgbe_phy_sfi_mode(struct xgbe_prv_data *pdata)
2058 struct xgbe_phy_data *phy_data = pdata->phy_data;
2060 xgbe_phy_set_redrv_mode(pdata);
2064 xgbe_phy_perform_ratechange(pdata, 3, 0);
2067 xgbe_phy_perform_ratechange(pdata, 3, 1);
2069 xgbe_phy_perform_ratechange(pdata, 3, 2);
2071 xgbe_phy_perform_ratechange(pdata, 3, 3);
2076 netif_dbg(pdata, link, pdata->netdev, "10GbE SFI mode set\n");
2079 static void xgbe_phy_x_mode(struct xgbe_prv_data *pdata)
2081 struct xgbe_phy_data *phy_data = pdata->phy_data;
2083 xgbe_phy_set_redrv_mode(pdata);
2086 xgbe_phy_perform_ratechange(pdata, 1, 3);
2090 netif_dbg(pdata, link, pdata->netdev, "1GbE X mode set\n");
2093 static void xgbe_phy_sgmii_1000_mode(struct xgbe_prv_data *pdata)
2095 struct xgbe_phy_data *phy_data = pdata->phy_data;
2097 xgbe_phy_set_redrv_mode(pdata);
2100 xgbe_phy_perform_ratechange(pdata, 1, 2);
2104 netif_dbg(pdata, link, pdata->netdev, "1GbE SGMII mode set\n");
2107 static void xgbe_phy_sgmii_100_mode(struct xgbe_prv_data *pdata)
2109 struct xgbe_phy_data *phy_data = pdata->phy_data;
2111 xgbe_phy_set_redrv_mode(pdata);
2114 xgbe_phy_perform_ratechange(pdata, 1, 1);
2118 netif_dbg(pdata, link, pdata->netdev, "100MbE SGMII mode set\n");
2121 static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata)
2123 struct xgbe_phy_data *phy_data = pdata->phy_data;
2125 xgbe_phy_set_redrv_mode(pdata);
2128 xgbe_phy_perform_ratechange(pdata, 4, 0);
2132 netif_dbg(pdata, link, pdata->netdev, "10GbE KR mode set\n");
2135 static void xgbe_phy_kx_2500_mode(struct xgbe_prv_data *pdata)
2137 struct xgbe_phy_data *phy_data = pdata->phy_data;
2139 xgbe_phy_set_redrv_mode(pdata);
2142 xgbe_phy_perform_ratechange(pdata, 2, 0);
2146 netif_dbg(pdata, link, pdata->netdev, "2.5GbE KX mode set\n");
2149 static void xgbe_phy_kx_1000_mode(struct xgbe_prv_data *pdata)
2151 struct xgbe_phy_data *phy_data = pdata->phy_data;
2153 xgbe_phy_set_redrv_mode(pdata);
2156 xgbe_phy_perform_ratechange(pdata, 1, 3);
2160 netif_dbg(pdata, link, pdata->netdev, "1GbE KX mode set\n");
2163 static enum xgbe_mode xgbe_phy_cur_mode(struct xgbe_prv_data *pdata)
2165 struct xgbe_phy_data *phy_data = pdata->phy_data;
2170 static enum xgbe_mode xgbe_phy_switch_baset_mode(struct xgbe_prv_data *pdata)
2172 struct xgbe_phy_data *phy_data = pdata->phy_data;
2176 return xgbe_phy_cur_mode(pdata);
2178 switch (xgbe_phy_cur_mode(pdata)) {
2188 static enum xgbe_mode xgbe_phy_switch_bp_2500_mode(struct xgbe_prv_data *pdata)
2193 static enum xgbe_mode xgbe_phy_switch_bp_mode(struct xgbe_prv_data *pdata)
2196 switch (xgbe_phy_cur_mode(pdata)) {
2205 static enum xgbe_mode xgbe_phy_switch_mode(struct xgbe_prv_data *pdata)
2207 struct xgbe_phy_data *phy_data = pdata->phy_data;
2212 return xgbe_phy_switch_bp_mode(pdata);
2214 return xgbe_phy_switch_bp_2500_mode(pdata);
2218 return xgbe_phy_switch_baset_mode(pdata);
2223 return xgbe_phy_cur_mode(pdata);
2300 static enum xgbe_mode xgbe_phy_get_mode(struct xgbe_prv_data *pdata,
2303 struct xgbe_phy_data *phy_data = pdata->phy_data;
2325 static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
2329 xgbe_phy_kx_1000_mode(pdata);
2332 xgbe_phy_kx_2500_mode(pdata);
2335 xgbe_phy_kr_mode(pdata);
2338 xgbe_phy_sgmii_100_mode(pdata);
2341 xgbe_phy_sgmii_1000_mode(pdata);
2344 xgbe_phy_x_mode(pdata);
2347 xgbe_phy_sfi_mode(pdata);
2354 static bool xgbe_phy_check_mode(struct xgbe_prv_data *pdata,
2357 if (pdata->phy.autoneg == AUTONEG_ENABLE) {
2362 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed);
2370 static bool xgbe_phy_use_basex_mode(struct xgbe_prv_data *pdata,
2373 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
2377 return xgbe_phy_check_mode(pdata, mode,
2380 return xgbe_phy_check_mode(pdata, mode,
2387 static bool xgbe_phy_use_baset_mode(struct xgbe_prv_data *pdata,
2390 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
2394 return xgbe_phy_check_mode(pdata, mode,
2397 return xgbe_phy_check_mode(pdata, mode,
2400 return xgbe_phy_check_mode(pdata, mode,
2403 return xgbe_phy_check_mode(pdata, mode,
2410 static bool xgbe_phy_use_sfp_mode(struct xgbe_prv_data *pdata,
2413 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
2414 struct xgbe_phy_data *phy_data = pdata->phy_data;
2420 return xgbe_phy_check_mode(pdata, mode,
2425 return xgbe_phy_check_mode(pdata, mode,
2430 return xgbe_phy_check_mode(pdata, mode,
2435 return xgbe_phy_check_mode(pdata, mode,
2446 static bool xgbe_phy_use_bp_2500_mode(struct xgbe_prv_data *pdata,
2449 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
2453 return xgbe_phy_check_mode(pdata, mode,
2460 static bool xgbe_phy_use_bp_mode(struct xgbe_prv_data *pdata,
2463 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
2467 return xgbe_phy_check_mode(pdata, mode,
2470 return xgbe_phy_check_mode(pdata, mode,
2477 static bool xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
2479 struct xgbe_phy_data *phy_data = pdata->phy_data;
2484 return xgbe_phy_use_bp_mode(pdata, mode);
2486 return xgbe_phy_use_bp_2500_mode(pdata, mode);
2490 return xgbe_phy_use_baset_mode(pdata, mode);
2493 return xgbe_phy_use_basex_mode(pdata, mode);
2495 return xgbe_phy_use_sfp_mode(pdata, mode);
2567 static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)
2569 struct xgbe_phy_data *phy_data = pdata->phy_data;
2591 static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)
2593 struct xgbe_phy_data *phy_data = pdata->phy_data;
2601 xgbe_phy_sfp_detect(pdata);
2618 if ((pdata->phy.autoneg == AUTONEG_ENABLE) &&
2629 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
2630 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
2634 if (pdata->phy.autoneg == AUTONEG_ENABLE &&
2636 if (!test_bit(XGBE_LINK_INIT, &pdata->dev_state)) {
2637 netif_carrier_off(pdata->netdev);
2645 xgbe_phy_rrc(pdata);
2651 static void xgbe_phy_sfp_gpio_setup(struct xgbe_prv_data *pdata)
2653 struct xgbe_phy_data *phy_data = pdata->phy_data;
2656 XP_GET_BITS(pdata->pp3, XP_PROP_3,
2659 phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2662 phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2664 phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2666 phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2668 phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2671 if (netif_msg_probe(pdata)) {
2672 dev_dbg(pdata->dev, "SFP: gpio_address=%#x\n",
2674 dev_dbg(pdata->dev, "SFP: gpio_mask=%#x\n",
2676 dev_dbg(pdata->dev, "SFP: gpio_rx_los=%u\n",
2678 dev_dbg(pdata->dev, "SFP: gpio_tx_fault=%u\n",
2680 dev_dbg(pdata->dev, "SFP: gpio_mod_absent=%u\n",
2682 dev_dbg(pdata->dev, "SFP: gpio_rate_select=%u\n",
2687 static void xgbe_phy_sfp_comm_setup(struct xgbe_prv_data *pdata)
2689 struct xgbe_phy_data *phy_data = pdata->phy_data;
2692 mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI);
2693 mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO);
2699 phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4,
2702 if (netif_msg_probe(pdata)) {
2703 dev_dbg(pdata->dev, "SFP: mux_address=%#x\n",
2705 dev_dbg(pdata->dev, "SFP: mux_channel=%u\n",
2710 static void xgbe_phy_sfp_setup(struct xgbe_prv_data *pdata)
2712 xgbe_phy_sfp_comm_setup(pdata);
2713 xgbe_phy_sfp_gpio_setup(pdata);
2716 static int xgbe_phy_int_mdio_reset(struct xgbe_prv_data *pdata)
2718 struct xgbe_phy_data *phy_data = pdata->phy_data;
2721 ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio);
2725 ret = pdata->hw_if.clr_gpio(pdata, phy_data->mdio_reset_gpio);
2730 static int xgbe_phy_i2c_mdio_reset(struct xgbe_prv_data *pdata)
2732 struct xgbe_phy_data *phy_data = pdata->phy_data;
2738 ret = xgbe_phy_i2c_read(pdata, phy_data->mdio_reset_addr,
2756 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr,
2768 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr,
2774 static int xgbe_phy_mdio_reset(struct xgbe_prv_data *pdata)
2776 struct xgbe_phy_data *phy_data = pdata->phy_data;
2782 ret = xgbe_phy_get_comm_ownership(pdata);
2787 ret = xgbe_phy_i2c_mdio_reset(pdata);
2789 ret = xgbe_phy_int_mdio_reset(pdata);
2791 xgbe_phy_put_comm_ownership(pdata);
2820 static int xgbe_phy_mdio_reset_setup(struct xgbe_prv_data *pdata)
2822 struct xgbe_phy_data *phy_data = pdata->phy_data;
2827 phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET);
2834 dev_err(pdata->dev, "unsupported MDIO reset (%#x)\n",
2841 XP_GET_BITS(pdata->pp3, XP_PROP_3,
2843 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2846 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2853 static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata)
2855 struct xgbe_phy_data *phy_data = pdata->phy_data;
2906 static bool xgbe_phy_conn_type_mismatch(struct xgbe_prv_data *pdata)
2908 struct xgbe_phy_data *phy_data = pdata->phy_data;
2936 static bool xgbe_phy_port_enabled(struct xgbe_prv_data *pdata)
2938 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS))
2940 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE))
2946 static void xgbe_phy_cdr_track(struct xgbe_prv_data *pdata)
2948 struct xgbe_phy_data *phy_data = pdata->phy_data;
2950 if (!pdata->debugfs_an_cdr_workaround)
2959 XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_CDR_CONTROL,
2966 static void xgbe_phy_cdr_notrack(struct xgbe_prv_data *pdata)
2968 struct xgbe_phy_data *phy_data = pdata->phy_data;
2970 if (!pdata->debugfs_an_cdr_workaround)
2976 XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_CDR_CONTROL,
2980 xgbe_phy_rrc(pdata);
2985 static void xgbe_phy_kr_training_post(struct xgbe_prv_data *pdata)
2987 if (!pdata->debugfs_an_cdr_track_early)
2988 xgbe_phy_cdr_track(pdata);
2991 static void xgbe_phy_kr_training_pre(struct xgbe_prv_data *pdata)
2993 if (pdata->debugfs_an_cdr_track_early)
2994 xgbe_phy_cdr_track(pdata);
2997 static void xgbe_phy_an_post(struct xgbe_prv_data *pdata)
2999 struct xgbe_phy_data *phy_data = pdata->phy_data;
3001 switch (pdata->an_mode) {
3007 xgbe_phy_cdr_track(pdata);
3009 switch (pdata->an_result) {
3026 static void xgbe_phy_an_pre(struct xgbe_prv_data *pdata)
3028 struct xgbe_phy_data *phy_data = pdata->phy_data;
3030 switch (pdata->an_mode) {
3036 xgbe_phy_cdr_notrack(pdata);
3043 static void xgbe_phy_stop(struct xgbe_prv_data *pdata)
3045 struct xgbe_phy_data *phy_data = pdata->phy_data;
3048 xgbe_phy_free_phy_device(pdata);
3052 xgbe_phy_sfp_mod_absent(pdata);
3055 xgbe_phy_cdr_track(pdata);
3058 xgbe_phy_power_off(pdata);
3061 pdata->i2c_if.i2c_stop(pdata);
3064 static int xgbe_phy_start(struct xgbe_prv_data *pdata)
3066 struct xgbe_phy_data *phy_data = pdata->phy_data;
3070 ret = pdata->i2c_if.i2c_start(pdata);
3076 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr,
3079 netdev_err(pdata->netdev,
3087 xgbe_phy_set_mode(pdata, phy_data->start_mode);
3090 xgbe_phy_cdr_track(pdata);
3095 xgbe_phy_sfp_detect(pdata);
3102 ret = xgbe_phy_find_phy_device(pdata);
3109 pdata->i2c_if.i2c_stop(pdata);
3114 static int xgbe_phy_reset(struct xgbe_prv_data *pdata)
3116 struct xgbe_phy_data *phy_data = pdata->phy_data;
3122 xgbe_phy_power_off(pdata);
3123 xgbe_phy_set_mode(pdata, cur_mode);
3129 ret = xgbe_phy_mdio_reset(pdata);
3136 static void xgbe_phy_exit(struct xgbe_prv_data *pdata)
3138 struct xgbe_phy_data *phy_data = pdata->phy_data;
3144 static int xgbe_phy_init(struct xgbe_prv_data *pdata)
3146 struct ethtool_link_ksettings *lks = &pdata->phy.lks;
3152 if (!xgbe_phy_port_enabled(pdata)) {
3153 dev_info(pdata->dev, "device is not enabled\n");
3158 ret = pdata->i2c_if.i2c_init(pdata);
3162 phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL);
3165 pdata->phy_data = phy_data;
3167 phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE);
3168 phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID);
3169 phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS);
3170 phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE);
3171 phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR);
3172 if (netif_msg_probe(pdata)) {
3173 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode);
3174 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id);
3175 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds);
3176 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type);
3177 dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr);
3180 phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT);
3181 phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF);
3182 phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR);
3183 phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE);
3184 phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL);
3185 if (phy_data->redrv && netif_msg_probe(pdata)) {
3186 dev_dbg(pdata->dev, "redrv present\n");
3187 dev_dbg(pdata->dev, "redrv i/f=%u\n", phy_data->redrv_if);
3188 dev_dbg(pdata->dev, "redrv addr=%#x\n", phy_data->redrv_addr);
3189 dev_dbg(pdata->dev, "redrv lane=%u\n", phy_data->redrv_lane);
3190 dev_dbg(pdata->dev, "redrv model=%u\n", phy_data->redrv_model);
3194 if (xgbe_phy_conn_type_mismatch(pdata)) {
3195 dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n",
3201 if (xgbe_phy_port_mode_mismatch(pdata)) {
3202 dev_err(pdata->dev, "phy mode/speed mismatch (%#x/%#x)\n",
3208 ret = xgbe_phy_mdio_reset_setup(pdata);
3214 dev_err(pdata->dev, "phy re-driver settings error\n");
3217 pdata->kr_redrv = phy_data->redrv;
3240 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE)
3341 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE)
3364 xgbe_phy_sfp_setup(pdata);
3370 if (netif_msg_probe(pdata))
3371 dev_dbg(pdata->dev, "phy supported=0x%*pb\n",
3377 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr,
3380 dev_err(pdata->dev,
3388 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr,
3391 dev_err(pdata->dev,
3401 mii = devm_mdiobus_alloc(pdata->dev);
3403 dev_err(pdata->dev, "mdiobus_alloc failed\n");
3407 mii->priv = pdata;
3411 mii->parent = pdata->dev;
3413 snprintf(mii->id, sizeof(mii->id), "%s", dev_name(pdata->dev));
3416 dev_err(pdata->dev, "mdiobus_register failed\n");