Lines Matching defs:write_csr
243 void (*write_csr) (unsigned long, int, u16);
383 .write_csr = pcnet32_wio_write_csr,
438 .write_csr = pcnet32_dwio_write_csr,
464 lp->a->write_csr(ioaddr, CSR3, val);
690 a->write_csr(ioaddr, CSR5, csr5 | CSR5_SUSPEND);
715 lp->a->write_csr(ioaddr, CSR5, csr5 & ~CSR5_SUSPEND);
763 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
776 lp->a->write_csr(ioaddr, CSR15, csr15);
889 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
985 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
991 lp->a->write_csr(ioaddr, CSR4, 0x0915); /* auto tx pad */
999 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */
1050 lp->a->write_csr(ioaddr, CSR15, x | 0x0044);
1053 lp->a->write_csr(ioaddr, CSR0, CSR0_START); /* Set STRT bit */
1072 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */
1108 a->write_csr(ioaddr, CSR15, (x & ~0x0044)); /* reset bits 6 and 2 */
1398 lp->a->write_csr(ioaddr, CSR4, 0x0915); /* auto tx pad */
1407 lp->a->write_csr(ioaddr, CSR3, val);
1410 lp->a->write_csr(ioaddr, CSR0, CSR0_INTEN);
1710 a->write_csr(ioaddr, 80,
1906 a->write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff));
1907 a->write_csr(ioaddr, 2, (lp->init_dma_addr >> 16));
1922 a->write_csr(ioaddr, CSR0, CSR0_INTEN | CSR0_INIT);
2142 lp->a->write_csr(ioaddr, 124, val);
2246 lp->a->write_csr(ioaddr, CSR3, val);
2262 lp->a->write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff));
2263 lp->a->write_csr(ioaddr, 2, (lp->init_dma_addr >> 16));
2265 lp->a->write_csr(ioaddr, CSR4, 0x0915); /* auto tx pad */
2266 lp->a->write_csr(ioaddr, CSR0, CSR0_INIT);
2284 lp->a->write_csr(ioaddr, CSR0, CSR0_NORMAL);
2431 lp->a->write_csr(ioaddr, CSR0, CSR0_INIT);
2437 lp->a->write_csr(ioaddr, CSR0, csr0_bits);
2450 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
2529 lp->a->write_csr(ioaddr, CSR0, CSR0_INTEN | CSR0_TXPOLL);
2560 lp->a->write_csr(ioaddr, CSR0, csr0 & ~0x004f);
2593 lp->a->write_csr(ioaddr, CSR3, val);
2630 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
2680 lp->a->write_csr(ioaddr, PCNET32_MC_FILTER, 0xffff);
2681 lp->a->write_csr(ioaddr, PCNET32_MC_FILTER+1, 0xffff);
2682 lp->a->write_csr(ioaddr, PCNET32_MC_FILTER+2, 0xffff);
2683 lp->a->write_csr(ioaddr, PCNET32_MC_FILTER+3, 0xffff);
2697 lp->a->write_csr(ioaddr, PCNET32_MC_FILTER + i,
2719 lp->a->write_csr(ioaddr, CSR15, csr15 | 0x8000);
2723 lp->a->write_csr(ioaddr, CSR15, csr15 & 0x7fff);
2730 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);