Lines Matching defs:write_rreg
47 static void write_rreg(u_long base, u_int reg, u_int val)
244 write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
253 write_rreg (dev->base_addr, i, multi_hash[i - LADRL]);
256 write_rreg (dev->base_addr, i, p[0] | (p[1] << 8));
258 write_rreg (dev->base_addr, MODE, mode);
259 write_rreg (dev->base_addr, POLLINT, 0);
260 write_rreg (dev->base_addr, SIZERXR, -RX_BUFFERS);
261 write_rreg (dev->base_addr, SIZETXR, -TX_BUFFERS);
292 write_rreg (dev->base_addr, BASERXL, priv->rxhdr);
293 write_rreg (dev->base_addr, BASERXH, 0);
294 write_rreg (dev->base_addr, BASETXL, priv->txhdr);
295 write_rreg (dev->base_addr, BASERXH, 0);
296 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
297 write_rreg (dev->base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO);
298 write_rreg (dev->base_addr, CSR4, CSR4_APAD_XMIT|CSR4_MFCOM|CSR4_RCVCCOM|CSR4_TXSTRTM|CSR4_JABM);
299 write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT);
365 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
366 write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
392 write_rreg(dev->base_addr, CTRL1, CTRL1_SPND);
408 write_rreg(dev->base_addr, i + LADRL, multi_hash[i]);
413 write_rreg(dev->base_addr, MODE, mode);
419 write_rreg(dev->base_addr, CTRL1, 0);
461 write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA);
594 write_rreg(dev->base_addr, CSR0, status &
639 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
640 write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);