Lines Matching refs:regs
516 * Remap the regs into kernel space - this is abuse of
521 ap->regs = ioremap(dev->base_addr, 0x4000);
522 if (!ap->regs) {
564 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
611 struct ace_regs __iomem *regs = ap->regs;
616 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
618 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
623 writel(1, ®s->Mb0Lo);
624 readl(®s->CpuCtrl); /* flush */
840 iounmap(ap->regs);
847 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
851 idx = readl(®s->CmdPrd);
853 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
856 writel(idx, ®s->CmdPrd);
863 struct ace_regs __iomem *regs;
874 regs = ap->regs;
883 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
884 readl(®s->HostCtrl); /* PCI write posting */
896 ®s->HostCtrl);
899 ®s->HostCtrl);
901 readl(®s->HostCtrl); /* PCI write posting */
906 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
907 readl(®s->CpuCtrl); /* PCI write posting */
908 writel(0, ®s->Mb0Lo);
910 tig_ver = readl(®s->HostCtrl) >> 28;
919 writel(0, ®s->LocalCtrl);
928 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
929 readl(®s->CpuBCtrl); /* PCI write posting */
935 writel(SRAM_BANK_512K, ®s->LocalCtrl);
936 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
956 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
959 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
961 readl(®s->ModeStat); /* PCI write posting */
988 writel(mac1, ®s->MacAddrHi);
989 writel(mac2, ®s->MacAddrLo);
1021 pci_state = readl(®s->PciState);
1107 writel(tmp, ®s->PciState);
1183 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1184 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1194 writel(0, ®s->EvtCsm);
1201 writel(0, ®s->CmdRng[i]);
1203 writel(0, ®s->CmdPrd);
1204 writel(0, ®s->CmdCsm);
1280 writel(TX_RING_BASE, ®s->WinBase);
1283 ap->tx_ring = (__force struct tx_desc *) regs->Window;
1315 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1316 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1318 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1319 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1322 writel(0, ®s->MaskInt);
1323 writel(1, ®s->IfIdx);
1329 writel(1, ®s->AssistState);
1332 writel(DEF_STAT, ®s->TuneStatTicks);
1333 writel(DEF_TRACE, ®s->TuneTrace);
1344 ®s->TuneTxCoalTicks);
1346 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1350 ®s->TuneRxCoalTicks);
1352 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1355 writel(trace[board_idx], ®s->TuneTrace);
1358 writel(tx_ratio[board_idx], ®s->TxBufRat);
1411 writel(tmp, ®s->TuneLink);
1413 writel(tmp, ®s->TuneFastLink);
1415 writel(ap->firmware_start, ®s->Pc);
1417 writel(0, ®s->Mb0Lo);
1429 ace_set_txprd(regs, ap, 0);
1430 writel(0, ®s->RxRetCsm);
1438 writel(1, ®s->AssistState); /* enable DMA */
1443 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1444 readl(®s->CpuCtrl);
1457 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1458 readl(®s->CpuCtrl);
1470 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1471 ®s->CpuBCtrl);
1472 writel(0, ®s->Mb0Lo);
1473 readl(®s->Mb0Lo);
1506 struct ace_regs __iomem *regs = ap->regs;
1512 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1514 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1516 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1518 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1520 writel(DEF_TX_RATIO, ®s->TxBufRat);
1524 ®s->TuneTxCoalTicks);
1527 ®s->TuneMaxTxDesc);
1530 ®s->TuneRxCoalTicks);
1533 ®s->TuneMaxRxDesc);
1535 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1545 struct ace_regs __iomem *regs = ap->regs;
1554 dev->name, (unsigned int)readl(®s->HostCtrl));
1628 struct ace_regs __iomem *regs = ap->regs;
1671 ace_issue_cmd(regs, &cmd);
1673 writel(idx, ®s->RxStdPrd);
1691 struct ace_regs __iomem *regs = ap->regs;
1728 writel(idx, ®s->RxMiniPrd);
1748 struct ace_regs __iomem *regs = ap->regs;
1788 ace_issue_cmd(regs, &cmd);
1790 writel(idx, ®s->RxJumboPrd);
1832 u32 state = readl(&ap->regs->GigLnkState);
1891 ace_issue_cmd(ap->regs, &cmd);
1893 writel(0, &((ap->regs)->RxJumboPrd));
2019 writel(idx, &ap->regs->RxRetCsm);
2100 struct ace_regs __iomem *regs = ap->regs;
2110 if (!(readl(®s->HostCtrl) & IN_INT))
2116 * writel(0, ®s->Mb0Lo).
2121 writel(0, ®s->Mb0Lo);
2122 readl(®s->Mb0Lo);
2152 evtcsm = readl(®s->EvtCsm);
2157 writel(evtcsm, ®s->EvtCsm);
2226 struct ace_regs __iomem *regs = ap->regs;
2234 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2239 ace_issue_cmd(regs, &cmd);
2244 ace_issue_cmd(regs, &cmd);
2254 ace_issue_cmd(regs, &cmd);
2265 ace_issue_cmd(regs, &cmd);
2281 struct ace_regs __iomem *regs = ap->regs;
2298 ace_issue_cmd(regs, &cmd);
2305 ace_issue_cmd(regs, &cmd);
2351 ace_issue_cmd(regs, &cmd);
2407 struct ace_regs __iomem *regs = ap->regs;
2494 ace_set_txprd(regs, ap, idx);
2543 struct ace_regs __iomem *regs = ap->regs;
2545 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2567 ace_issue_cmd(regs, &cmd);
2578 struct ace_regs __iomem *regs = ap->regs;
2591 link = readl(®s->GigLnkState);
2595 link = readl(®s->FastLnkState);
2617 ecmd->trace = readl(®s->TuneTrace);
2619 ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2620 ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2633 struct ace_regs __iomem *regs = ap->regs;
2636 link = readl(®s->GigLnkState);
2640 link = readl(®s->FastLnkState);
2679 writel(link, ®s->TuneLink);
2681 writel(link, ®s->TuneFastLink);
2687 ace_issue_cmd(regs, &cmd);
2713 struct ace_regs __iomem *regs = ap->regs;
2725 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2727 ®s->MacAddrLo);
2732 ace_issue_cmd(regs, &cmd);
2741 struct ace_regs __iomem *regs = ap->regs;
2748 ace_issue_cmd(regs, &cmd);
2754 ace_issue_cmd(regs, &cmd);
2762 ace_issue_cmd(regs, &cmd);
2768 ace_issue_cmd(regs, &cmd);
2782 ace_issue_cmd(regs, &cmd);
2787 ace_issue_cmd(regs, &cmd);
2796 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2806 static void ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
2818 tdest = (void __iomem *) ®s->Window +
2820 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2833 static void ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2844 tdest = (void __iomem *) ®s->Window +
2846 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2869 struct ace_regs __iomem *regs = ap->regs;
2874 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2921 ace_clear(regs, 0x2000, 0x80000-0x2000);
2922 ace_copy(regs, &fw_data[3], load_addr, fw->size-12);
2944 static void eeprom_start(struct ace_regs __iomem *regs)
2948 readl(®s->LocalCtrl);
2950 local = readl(®s->LocalCtrl);
2952 writel(local, ®s->LocalCtrl);
2953 readl(®s->LocalCtrl);
2957 writel(local, ®s->LocalCtrl);
2958 readl(®s->LocalCtrl);
2962 writel(local, ®s->LocalCtrl);
2963 readl(®s->LocalCtrl);
2967 writel(local, ®s->LocalCtrl);
2968 readl(®s->LocalCtrl);
2973 static void eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
2979 local = readl(®s->LocalCtrl);
2982 writel(local, ®s->LocalCtrl);
2983 readl(®s->LocalCtrl);
2992 writel(local, ®s->LocalCtrl);
2993 readl(®s->LocalCtrl);
2998 writel(local, ®s->LocalCtrl);
2999 readl(®s->LocalCtrl);
3003 writel(local, ®s->LocalCtrl);
3004 readl(®s->LocalCtrl);
3010 static int eeprom_check_ack(struct ace_regs __iomem *regs)
3015 local = readl(®s->LocalCtrl);
3017 writel(local, ®s->LocalCtrl);
3018 readl(®s->LocalCtrl);
3022 writel(local, ®s->LocalCtrl);
3023 readl(®s->LocalCtrl);
3027 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3030 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3031 readl(®s->LocalCtrl);
3038 static void eeprom_stop(struct ace_regs __iomem *regs)
3043 local = readl(®s->LocalCtrl);
3045 writel(local, ®s->LocalCtrl);
3046 readl(®s->LocalCtrl);
3050 writel(local, ®s->LocalCtrl);
3051 readl(®s->LocalCtrl);
3055 writel(local, ®s->LocalCtrl);
3056 readl(®s->LocalCtrl);
3060 writel(local, ®s->LocalCtrl);
3061 readl(®s->LocalCtrl);
3065 writel(local, ®s->LocalCtrl);
3076 struct ace_regs __iomem *regs = ap->regs;
3088 eeprom_start(regs);
3090 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3091 if (eeprom_check_ack(regs)) {
3098 eeprom_prep(regs, (offset >> 8) & 0xff);
3099 if (eeprom_check_ack(regs)) {
3107 eeprom_prep(regs, offset & 0xff);
3108 if (eeprom_check_ack(regs)) {
3116 eeprom_start(regs);
3117 eeprom_prep(regs, EEPROM_READ_SELECT);
3118 if (eeprom_check_ack(regs)) {
3127 local = readl(®s->LocalCtrl);
3129 writel(local, ®s->LocalCtrl);
3130 readl(®s->LocalCtrl);
3134 writel(local, ®s->LocalCtrl);
3135 readl(®s->LocalCtrl);
3140 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3143 local = readl(®s->LocalCtrl);
3145 writel(local, ®s->LocalCtrl);
3146 readl(®s->LocalCtrl);
3151 writel(local, ®s->LocalCtrl);
3152 readl(®s->LocalCtrl);
3159 writel(local, ®s->LocalCtrl);
3160 readl(®s->LocalCtrl);
3163 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3164 readl(®s->LocalCtrl);
3166 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3167 readl(®s->LocalCtrl);
3170 eeprom_stop(regs);