Lines Matching refs:status
436 and status registers available in each.
463 /* Bits in the general status register. */
545 __le32 status;
549 /* Values for the Rx status entry. */
565 __le32 status; /* bits 0:12 length, others see below. */
577 /* Values for the Tx status entry. */
613 void __iomem *cb_fn_base; /* CardBus function status addr space. */
725 int wait; /* Time before we check media status. */
1410 pr_info(" MII transceiver found at address %d, status %4x.\n",
1628 pr_debug("%s: vortex_up() irq %d media status %4.4x.\n",
1682 vp->rx_ring[i].status = 0;
1695 /* Allow status bits to be seen. */
1737 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1885 pr_err("%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1937 vortex_error(struct net_device *dev, int status)
1945 pr_err("%s: vortex_error(), status=0x%x\n", dev->name, status);
1948 if (status & TxComplete) { /* Really "TxError" for us. */
1953 pr_err("%s: Transmit error, Tx status register %2.2x.\n",
1975 if (status & RxEarly) /* Rx early is unused. */
1978 if (status & StatsFull) { /* Empty statistics. */
1996 if (status & IntReq) { /* Restore all interrupt sources. */
2000 if (status & HostError) {
2011 pr_err("%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2085 /* Clear the Tx status stack. */
2093 pr_debug("%s: Tx error, status %2.2x.\n",
2102 iowrite8(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2148 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2150 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2208 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2230 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2256 int status;
2263 status = ioread16(ioaddr + EL3_STATUS);
2266 pr_debug("vortex_interrupt(). status=0x%4x\n", status);
2268 if ((status & IntLatch) == 0)
2272 if (status & IntReq) {
2273 status |= vp->deferred;
2277 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2281 pr_debug("%s: interrupt, status %4.4x, latency %d ticks.\n",
2282 dev->name, status, ioread8(ioaddr + Timer));
2289 pr_debug("%s: In interrupt loop, status %4.4x.\n",
2290 dev->name, status);
2291 if (status & RxComplete)
2294 if (status & TxAvailable) {
2302 if (status & DMADone) {
2323 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2324 if (status == 0xffff)
2326 if (status & RxEarly)
2329 vortex_error(dev, status);
2335 pr_warn("%s: Too much work in interrupt, status %4.4x\n",
2336 dev->name, status);
2339 vp->deferred |= status;
2343 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2350 } while ((status = ioread16(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2356 pr_debug("%s: exiting interrupt, status %4.4x.\n",
2357 dev->name, status);
2372 int status;
2381 status = ioread16(ioaddr + EL3_STATUS);
2384 pr_debug("boomerang_interrupt. status=0x%4x\n", status);
2386 if ((status & IntLatch) == 0)
2390 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2392 pr_debug("boomerang_interrupt(1): status = 0xffff\n");
2396 if (status & IntReq) {
2397 status |= vp->deferred;
2402 pr_debug("%s: interrupt, status %4.4x, latency %d ticks.\n",
2403 dev->name, status, ioread8(ioaddr + Timer));
2406 pr_debug("%s: In interrupt loop, status %4.4x.\n",
2407 dev->name, status);
2408 if (status & UpComplete) {
2415 if (status & DownComplete) {
2426 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2467 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2468 vortex_error(dev, status);
2471 pr_warn("%s: Too much work in interrupt, status %4.4x\n",
2472 dev->name, status);
2475 vp->deferred |= status;
2479 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2489 } while ((status = ioread16(ioaddr + EL3_STATUS)) & IntLatch);
2493 pr_debug("%s: exiting interrupt, status %4.4x.\n",
2494 dev->name, status);
2528 pr_debug("vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2534 pr_debug(" Rx error: status %2.2x.\n", rx_error);
2548 pr_debug("Receiving packet size %d status %4.4x.\n",
2598 pr_debug("boomerang_rx(): status %4.4x\n", ioread16(ioaddr+EL3_STATUS));
2600 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2606 pr_debug(" Rx error: status %2.2x.\n", rx_error);
2621 pr_debug("Receiving packet size %d status %4.4x.\n",
2676 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2734 pr_debug("%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2812 pr_err(" %d: @%p length %8.8x status %8.8x\n",
2814 le32_to_cpu(vp->tx_ring[i].status));