Lines Matching refs:chip
10 #include "chip.h"
13 /* The switch ADDR[4:1] configuration pins define the chip SMI device address
16 * When ADDR is all zero, the chip uses Single-chip Addressing Mode, assuming it
20 * When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing
29 static int mv88e6xxx_smi_direct_read(struct mv88e6xxx_chip *chip,
34 ret = mdiobus_read_nested(chip->bus, dev, reg);
43 static int mv88e6xxx_smi_direct_write(struct mv88e6xxx_chip *chip,
48 ret = mdiobus_write_nested(chip->bus, dev, reg, data);
55 static int mv88e6xxx_smi_direct_wait(struct mv88e6xxx_chip *chip,
63 err = mv88e6xxx_smi_direct_read(chip, dev, reg, &data);
81 static int mv88e6xxx_smi_dual_direct_read(struct mv88e6xxx_chip *chip,
84 return mv88e6xxx_smi_direct_read(chip, chip->sw_addr + dev, reg, data);
87 static int mv88e6xxx_smi_dual_direct_write(struct mv88e6xxx_chip *chip,
90 return mv88e6xxx_smi_direct_write(chip, chip->sw_addr + dev, reg, data);
102 static int mv88e6xxx_smi_indirect_read(struct mv88e6xxx_chip *chip,
107 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr,
112 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr,
121 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr,
126 return mv88e6xxx_smi_direct_read(chip, chip->sw_addr,
130 static int mv88e6xxx_smi_indirect_write(struct mv88e6xxx_chip *chip,
135 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr,
140 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr,
145 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr,
154 return mv88e6xxx_smi_direct_wait(chip, chip->sw_addr,
163 int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,
166 if (chip->info->dual_chip)
167 chip->smi_ops = &mv88e6xxx_smi_dual_direct_ops;
169 chip->smi_ops = &mv88e6xxx_smi_direct_ops;
170 else if (chip->info->multi_chip)
171 chip->smi_ops = &mv88e6xxx_smi_indirect_ops;
175 chip->bus = bus;
176 chip->sw_addr = sw_addr;