Lines Matching refs:lane
37 int lane, int device, int reg, u16 *val)
41 return mv88e6xxx_phy_read(chip, lane, reg_c45, val);
45 int lane, int device, int reg, u16 val)
49 return mv88e6xxx_phy_write(chip, lane, reg_c45, val);
98 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
120 u8 lane, unsigned int mode,
169 u8 lane, struct phylink_link_state *state)
190 u8 lane)
203 u8 lane, int speed, int duplex)
236 u8 lane = 0;
241 lane = 0xff; /* Unused */
243 return lane;
357 u8 lane)
375 int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, u8 lane,
417 u8 lane = 0;
424 lane = MV88E6341_PORT5_LANE;
428 return lane;
434 u8 lane = 0;
441 lane = MV88E6390_PORT9_LANE0;
447 lane = MV88E6390_PORT10_LANE0;
451 return lane;
459 u8 lane = 0;
467 lane = MV88E6390_PORT9_LANE1;
475 lane = MV88E6390_PORT9_LANE2;
483 lane = MV88E6390_PORT9_LANE3;
490 lane = MV88E6390_PORT10_LANE1;
498 lane = MV88E6390_PORT10_LANE2;
506 lane = MV88E6390_PORT10_LANE3;
514 lane = MV88E6390_PORT9_LANE0;
522 lane = MV88E6390_PORT10_LANE0;
526 return lane;
530 static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, u8 lane,
536 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
550 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
557 static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, u8 lane,
563 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
574 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
616 static uint64_t mv88e6390_serdes_get_stat(struct mv88e6xxx_chip *chip, int lane,
623 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
638 int lane;
641 lane = mv88e6xxx_serdes_get_lane(chip, port);
642 if (lane == 0)
647 data[i] = mv88e6390_serdes_get_stat(chip, lane, stat);
653 static int mv88e6390_serdes_enable_checker(struct mv88e6xxx_chip *chip, u8 lane)
658 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
664 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
668 int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
678 err = mv88e6390_serdes_power_sgmii(chip, lane, up);
682 err = mv88e6390_serdes_power_10g(chip, lane, up);
687 err = mv88e6390_serdes_enable_checker(chip, lane);
693 u8 lane, unsigned int mode,
720 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
727 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
733 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
747 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
752 int port, u8 lane, struct phylink_link_state *state)
757 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
764 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
775 int port, u8 lane, struct phylink_link_state *state)
780 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
795 u8 lane, struct phylink_link_state *state)
801 return mv88e6390_serdes_pcs_get_state_sgmii(chip, port, lane,
805 return mv88e6390_serdes_pcs_get_state_10g(chip, port, lane,
814 u8 lane)
819 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
824 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
830 u8 lane, int speed, int duplex)
835 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
859 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
864 int port, u8 lane)
870 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
881 u8 lane, bool enable)
889 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
893 int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, u8 lane,
902 return mv88e6390_serdes_irq_enable_sgmii(chip, lane, enable);
909 u8 lane, u16 *status)
913 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
920 u8 lane)
931 err = mv88e6390_serdes_irq_status_sgmii(chip, lane, &status);
937 mv88e6390_serdes_irq_link_sgmii(chip, port, lane);
988 int lane;
992 lane = mv88e6xxx_serdes_get_lane(chip, port);
993 if (lane == 0)
997 mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,