Lines Matching defs:mode
69 phy_interface_t mode)
81 switch (mode) {
110 phy_interface_t mode)
115 return mv88e6xxx_port_set_rgmii_delay(chip, port, mode);
119 phy_interface_t mode)
124 return mv88e6xxx_port_set_rgmii_delay(chip, port, mode);
394 phy_interface_t mode, bool force)
401 /* Default to a slow mode, so freeing up SERDES interfaces for
404 if (mode == PHY_INTERFACE_MODE_NA)
405 mode = PHY_INTERFACE_MODE_1000BASEX;
407 switch (mode) {
480 phy_interface_t mode)
485 return mv88e6xxx_port_set_cmode(chip, port, mode, false);
489 phy_interface_t mode)
494 switch (mode) {
505 return mv88e6xxx_port_set_cmode(chip, port, mode, false);
534 phy_interface_t mode)
541 switch (mode) {
556 return mv88e6xxx_port_set_cmode(chip, port, mode, true);
667 enum mv88e6xxx_egress_mode mode)
678 switch (mode) {
699 enum mv88e6xxx_frame_mode mode)
710 switch (mode) {
725 enum mv88e6xxx_frame_mode mode)
736 switch (mode) {
1043 u16 mode)
1053 reg |= mode & MV88E6XXX_PORT_CTL2_8021Q_MODE_MASK;
1060 mv88e6xxx_port_8021q_mode_names[mode]);