Lines Matching defs:mt7530_rmw
268 mt7530_rmw(struct mt7530_priv *priv, u32 reg,
287 mt7530_rmw(priv, reg, 0, val);
293 mt7530_rmw(priv, reg, val, 0);
430 mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK,
488 mt7530_rmw(priv, MT7530_TRGMII_RD(i),
966 mt7530_rmw(priv, MT7530_MFC, UNM_FFP_MASK, UNM_FFP(BIT(port)));
970 mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
995 mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
1015 mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
1047 mt7530_rmw(priv, MT7530_SSP_P(port), FID_PST_MASK, stp_state);
1079 mt7530_rmw(priv, MT7530_PCR_P(port),
1099 mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,
1101 mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK | PVC_EG_TAG_MASK,
1134 mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,
1137 mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,
1143 mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK | PVC_EG_TAG_MASK,
1176 mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
1330 mt7530_rmw(priv, MT7530_VAWD2,
1339 mt7530_rmw(priv, MT7530_VAWD2,
1415 mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,
1446 mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, pvid);
1626 mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
1637 mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
1743 mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK,
1745 mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK,
1753 mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
1773 mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
1775 mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK,
1783 mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
1796 mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
2035 mt7530_rmw(priv, MT7531_SGMII_MODE(port),
2053 mt7530_rmw(priv, MT7531_PHYA_CTRL_SIGNAL3(port),
2060 mt7530_rmw(priv, MT7531_PCS_SPEED_ABILITY(port),