Lines Matching refs:dev
227 static int b53_do_vlan_op(struct b53_device *dev, u8 op)
231 b53_write8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], VTA_START_CMD | op);
236 b53_read8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], &vta);
246 static void b53_set_vlan_entry(struct b53_device *dev, u16 vid,
249 if (is5325(dev)) {
255 if (dev->core_rev >= 3)
261 b53_write32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, entry);
262 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |
264 } else if (is5365(dev)) {
271 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, entry);
272 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |
275 b53_write16(dev, B53_ARLIO_PAGE, dev->vta_regs[1], vid);
276 b53_write32(dev, B53_ARLIO_PAGE, dev->vta_regs[2],
279 b53_do_vlan_op(dev, VTA_CMD_WRITE);
282 dev_dbg(dev->ds->dev, "VID: %d, members: 0x%04x, untag: 0x%04x\n",
286 static void b53_get_vlan_entry(struct b53_device *dev, u16 vid,
289 if (is5325(dev)) {
292 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |
294 b53_read32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, &entry);
296 if (dev->core_rev >= 3)
303 } else if (is5365(dev)) {
306 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |
308 b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, &entry);
316 b53_write16(dev, B53_ARLIO_PAGE, dev->vta_regs[1], vid);
317 b53_do_vlan_op(dev, VTA_CMD_READ);
318 b53_read32(dev, B53_ARLIO_PAGE, dev->vta_regs[2], &entry);
325 static void b53_set_forwarding(struct b53_device *dev, int enable)
329 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
336 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
340 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, &mgmt);
342 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, mgmt);
347 b53_read8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, &mgmt);
349 b53_write8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, mgmt);
352 static void b53_enable_vlan(struct b53_device *dev, bool enable,
357 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
358 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, &vc0);
359 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, &vc1);
361 if (is5325(dev) || is5365(dev)) {
362 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
363 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, &vc5);
364 } else if (is63xx(dev)) {
365 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, &vc4);
366 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, &vc5);
368 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, &vc4);
369 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
384 if (is5325(dev))
387 if (is5325(dev) || is5365(dev))
396 if (is5325(dev) || is5365(dev))
401 if (is5325(dev) || is5365(dev))
405 if (!is5325(dev) && !is5365(dev))
408 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, vc0);
409 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, vc1);
411 if (is5325(dev) || is5365(dev)) {
413 if (is5325(dev) && enable)
414 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3,
417 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
419 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, vc4);
420 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, vc5);
421 } else if (is63xx(dev)) {
422 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3_63XX, 0);
423 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, vc4);
424 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, vc5);
426 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
427 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, vc4);
428 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, vc5);
431 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
433 dev->vlan_enabled = enable;
436 static int b53_set_jumbo(struct b53_device *dev, bool enable, bool allow_10_100)
441 if (is5325(dev) || is5365(dev))
445 port_mask = dev->enabled_ports;
451 b53_write32(dev, B53_JUMBO_PAGE, dev->jumbo_pm_reg, port_mask);
452 return b53_write16(dev, B53_JUMBO_PAGE, dev->jumbo_size_reg, max_size);
455 static int b53_flush_arl(struct b53_device *dev, u8 mask)
459 b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
465 b53_read8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
477 b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL, FAST_AGE_DYNAMIC);
481 static int b53_fast_age_port(struct b53_device *dev, int port)
483 b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_PORT_CTRL, port);
485 return b53_flush_arl(dev, FAST_AGE_PORT);
488 static int b53_fast_age_vlan(struct b53_device *dev, u16 vid)
490 b53_write16(dev, B53_CTRL_PAGE, B53_FAST_AGE_VID_CTRL, vid);
492 return b53_flush_arl(dev, FAST_AGE_VLAN);
497 struct b53_device *dev = ds->priv;
505 b53_for_each_port(dev, i) {
506 b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), &pvlan);
508 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), pvlan);
513 static void b53_port_set_learning(struct b53_device *dev, int port,
518 b53_read16(dev, B53_CTRL_PAGE, B53_DIS_LEARNING, ®);
523 b53_write16(dev, B53_CTRL_PAGE, B53_DIS_LEARNING, reg);
528 struct b53_device *dev = ds->priv;
539 b53_port_set_learning(dev, port, false);
541 if (dev->ops->irq_enable)
542 ret = dev->ops->irq_enable(dev, port);
547 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), 0);
553 b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), &pvlan);
556 pvlan |= dev->ports[port].vlan_ctl_mask;
557 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), pvlan);
562 if (dev->ports[port].eee.eee_enabled)
571 struct b53_device *dev = ds->priv;
575 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), ®);
577 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), reg);
579 if (dev->ops->irq_disable)
580 dev->ops->irq_disable(dev, port);
586 struct b53_device *dev = ds->priv;
587 bool tag_en = !(dev->tag_protocol == DSA_TAG_PROTO_NONE);
608 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &hdr_ctl);
613 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, hdr_ctl);
616 b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &hdr_ctl);
621 b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, hdr_ctl);
624 b53_read8(dev, B53_MGMT_PAGE, B53_BRCM_HDR, &hdr_ctl);
629 b53_write8(dev, B53_MGMT_PAGE, B53_BRCM_HDR, hdr_ctl);
632 if (!is58xx(dev))
638 b53_read16(dev, B53_MGMT_PAGE, B53_BRCM_HDR_RX_DIS, ®);
643 b53_write16(dev, B53_MGMT_PAGE, B53_BRCM_HDR_RX_DIS, reg);
648 b53_read16(dev, B53_MGMT_PAGE, B53_BRCM_HDR_TX_DIS, ®);
653 b53_write16(dev, B53_MGMT_PAGE, B53_BRCM_HDR_TX_DIS, reg);
657 static void b53_enable_cpu_port(struct b53_device *dev, int port)
662 if ((is5325(dev) || is5365(dev)) && port == B53_CPU_PORT_25)
668 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), port_ctrl);
670 b53_brcm_hdr_setup(dev->ds, port);
672 b53_br_egress_floods(dev->ds, port, true, true);
673 b53_port_set_learning(dev, port, false);
676 static void b53_enable_mib(struct b53_device *dev)
680 b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
682 b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);
685 static u16 b53_default_pvid(struct b53_device *dev)
687 if (is5325(dev) || is5365(dev))
695 struct b53_device *dev = ds->priv;
701 def_vid = b53_default_pvid(dev);
704 if (is5325(dev) || is5365(dev)) {
705 for (i = def_vid; i < dev->num_vlans; i++)
706 b53_set_vlan_entry(dev, i, &vl);
708 b53_do_vlan_op(dev, VTA_CMD_CLEAR);
711 b53_enable_vlan(dev, dev->vlan_enabled, ds->vlan_filtering);
713 b53_for_each_port(dev, i)
714 b53_write16(dev, B53_VLAN_PAGE,
720 for (vid = def_vid; vid < dev->num_vlans; vid++) {
721 v = &dev->vlans[vid];
726 b53_set_vlan_entry(dev, vid, v);
727 b53_fast_age_vlan(dev, vid);
734 static void b53_switch_reset_gpio(struct b53_device *dev)
736 int gpio = dev->reset_gpio;
749 dev->current_page = 0xff;
752 static int b53_switch_reset(struct b53_device *dev)
757 b53_switch_reset_gpio(dev);
759 if (is539x(dev)) {
760 b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x83);
761 b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x00);
769 if (dev->chip_id == BCM58XX_DEVICE_ID ||
770 dev->chip_id == BCM583XX_DEVICE_ID) {
771 b53_read8(dev, B53_CTRL_PAGE, B53_SOFTRESET, ®);
773 b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, reg);
776 b53_read8(dev, B53_CTRL_PAGE, B53_SOFTRESET, ®);
784 dev_err(dev->dev,
790 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
796 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
797 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
800 dev_err(dev->dev, "Failed to enable switch!\n");
805 b53_enable_mib(dev);
807 return b53_flush_arl(dev, FAST_AGE_STATIC);
871 static const struct b53_mib_desc *b53_get_mib(struct b53_device *dev)
873 if (is5365(dev))
875 else if (is63xx(dev))
877 else if (is58xx(dev))
883 static unsigned int b53_get_mib_size(struct b53_device *dev)
885 if (is5365(dev))
887 else if (is63xx(dev))
889 else if (is58xx(dev))
911 struct b53_device *dev = ds->priv;
912 const struct b53_mib_desc *mibs = b53_get_mib(dev);
913 unsigned int mib_size = b53_get_mib_size(dev);
933 struct b53_device *dev = ds->priv;
934 const struct b53_mib_desc *mibs = b53_get_mib(dev);
935 unsigned int mib_size = b53_get_mib_size(dev);
940 if (is5365(dev) && port == 5)
943 mutex_lock(&dev->stats_mutex);
949 b53_read64(dev, B53_MIB_PAGE(port), s->offset, &val);
953 b53_read32(dev, B53_MIB_PAGE(port), s->offset,
960 mutex_unlock(&dev->stats_mutex);
978 struct b53_device *dev = ds->priv;
982 return b53_get_mib_size(dev);
1001 struct b53_device *dev = priv;
1006 for (i = 0; i < dev->num_vlans; i++) {
1007 vl = &dev->vlans[i];
1018 struct b53_device *dev = ds->priv;
1021 devlink_resource_size_params_init(&size_params, dev->num_vlans,
1022 dev->num_vlans,
1025 err = dsa_devlink_resource_register(ds, "VLAN", dev->num_vlans,
1034 b53_devlink_vlan_table_get, dev);
1045 struct b53_device *dev = ds->priv;
1049 ret = b53_reset_switch(dev);
1051 dev_err(ds->dev, "failed to reset switch\n");
1055 b53_reset_mib(dev);
1057 ret = b53_apply_config(dev);
1059 dev_err(ds->dev, "failed to apply configuration\n");
1066 for (port = 0; port < dev->num_ports; port++) {
1068 b53_enable_cpu_port(dev, port);
1081 static void b53_force_link(struct b53_device *dev, int port, int link)
1086 if (port == dev->imp_port) {
1094 b53_read8(dev, B53_CTRL_PAGE, off, ®);
1100 b53_write8(dev, B53_CTRL_PAGE, off, reg);
1103 static void b53_force_port_config(struct b53_device *dev, int port,
1110 if (port == dev->imp_port) {
1118 b53_read8(dev, B53_CTRL_PAGE, off, ®);
1139 dev_err(dev->dev, "unknown speed: %d\n", speed);
1148 b53_write8(dev, B53_CTRL_PAGE, off, reg);
1154 struct b53_device *dev = ds->priv;
1155 struct ethtool_eee *p = &dev->ports[port].eee;
1164 if (is5301x(dev) && port == dev->cpu_port)
1173 b53_force_port_config(dev, port, phydev->speed, phydev->duplex,
1175 b53_force_link(dev, port, phydev->link);
1177 if (is531x5(dev) && phy_interface_is_rgmii(phydev)) {
1178 if (port == dev->imp_port)
1186 b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
1209 b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);
1211 dev_info(ds->dev, "Configured port %d for %s\n", port,
1216 if (is5325(dev)) {
1217 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
1222 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
1224 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
1228 dev_err(ds->dev,
1233 } else if (is5301x(dev)) {
1234 if (port != dev->cpu_port) {
1235 b53_force_port_config(dev, dev->cpu_port, 2000,
1237 b53_force_link(dev, dev->cpu_port, 1);
1247 struct b53_device *dev = ds->priv;
1251 b53_read16(dev, B53_STAT_PAGE, B53_LINK_STAT, &sts);
1261 struct b53_device *dev = ds->priv;
1264 if (dev->ops->serdes_phylink_validate)
1265 dev->ops->serdes_phylink_validate(dev, port, mask, state);
1279 !(is5325(dev) || is5365(dev))) {
1303 struct b53_device *dev = ds->priv;
1308 dev->ops->serdes_link_state)
1309 ret = dev->ops->serdes_link_state(dev, port, state);
1319 struct b53_device *dev = ds->priv;
1326 dev->ops->serdes_config)
1327 dev->ops->serdes_config(dev, port, mode, state);
1333 struct b53_device *dev = ds->priv;
1335 if (dev->ops->serdes_an_restart)
1336 dev->ops->serdes_an_restart(dev, port);
1344 struct b53_device *dev = ds->priv;
1350 b53_force_link(dev, port, false);
1355 dev->ops->serdes_link_set)
1356 dev->ops->serdes_link_set(dev, port, mode, interface, false);
1367 struct b53_device *dev = ds->priv;
1373 b53_force_port_config(dev, port, speed, duplex,
1375 b53_force_link(dev, port, true);
1380 dev->ops->serdes_link_set)
1381 dev->ops->serdes_link_set(dev, port, mode, interface, true);
1388 struct b53_device *dev = ds->priv;
1393 b53_enable_vlan(dev, dev->vlan_enabled, vlan_filtering);
1402 struct b53_device *dev = ds->priv;
1404 if ((is5325(dev) || is5365(dev)) && vlan->vid_begin == 0)
1411 if (dev->chip_id == BCM7278_DEVICE_ID && port == 7 &&
1415 if (vlan->vid_end >= dev->num_vlans)
1418 b53_enable_vlan(dev, true, ds->vlan_filtering);
1427 struct b53_device *dev = ds->priv;
1434 vl = &dev->vlans[vid];
1436 b53_get_vlan_entry(dev, vid, vl);
1438 if (vid == 0 && vid == b53_default_pvid(dev))
1447 b53_set_vlan_entry(dev, vid, vl);
1448 b53_fast_age_vlan(dev, vid);
1452 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port),
1454 b53_fast_age_vlan(dev, vid);
1462 struct b53_device *dev = ds->priv;
1468 b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port), &pvid);
1471 vl = &dev->vlans[vid];
1473 b53_get_vlan_entry(dev, vid, vl);
1478 pvid = b53_default_pvid(dev);
1483 b53_set_vlan_entry(dev, vid, vl);
1484 b53_fast_age_vlan(dev, vid);
1487 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port), pvid);
1488 b53_fast_age_vlan(dev, pvid);
1495 static int b53_arl_op_wait(struct b53_device *dev)
1501 b53_read8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, ®);
1508 dev_warn(dev->dev, "timeout waiting for ARL to finish: 0x%02x\n", reg);
1513 static int b53_arl_rw_op(struct b53_device *dev, unsigned int op)
1520 b53_read8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, ®);
1526 if (dev->vlan_enabled)
1530 b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, reg);
1532 return b53_arl_op_wait(dev);
1535 static int b53_arl_read(struct b53_device *dev, u64 mac,
1542 ret = b53_arl_op_wait(dev);
1546 bitmap_zero(free_bins, dev->num_arl_bins);
1549 for (i = 0; i < dev->num_arl_bins; i++) {
1553 b53_read64(dev, B53_ARLIO_PAGE,
1555 b53_read32(dev, B53_ARLIO_PAGE,
1565 if (dev->vlan_enabled &&
1572 if (bitmap_weight(free_bins, dev->num_arl_bins) == 0)
1575 *idx = find_first_bit(free_bins, dev->num_arl_bins);
1580 static int b53_arl_op(struct b53_device *dev, int op, int port,
1593 b53_write48(dev, B53_ARLIO_PAGE, B53_MAC_ADDR_IDX, mac);
1594 b53_write16(dev, B53_ARLIO_PAGE, B53_VLAN_ID_IDX, vid);
1597 ret = b53_arl_rw_op(dev, 1);
1601 ret = b53_arl_read(dev, mac, vid, &ent, &idx);
1611 dev_dbg(dev->dev, "{%pM,%.4d} no space left in ARL\n",
1616 dev_dbg(dev->dev, "{%pM,%.4d} not found, using idx: %d\n",
1621 dev_dbg(dev->dev, "{%pM,%.4d} found, using idx: %d\n",
1647 b53_write64(dev, B53_ARLIO_PAGE,
1649 b53_write32(dev, B53_ARLIO_PAGE,
1652 return b53_arl_rw_op(dev, 0);
1679 static int b53_arl_search_wait(struct b53_device *dev)
1685 b53_read8(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_CTL, ®);
1698 static void b53_arl_search_rd(struct b53_device *dev, u8 idx,
1704 b53_read64(dev, B53_ARLIO_PAGE,
1706 b53_read32(dev, B53_ARLIO_PAGE,
1785 dev_err(ds->dev, "failed to add MDB entry\n");
1797 dev_err(ds->dev, "failed to delete MDB entry\n");
1805 struct b53_device *dev = ds->priv;
1813 if (dev->chip_id == BCM7278_DEVICE_ID && port == 7)
1819 if (is58xx(dev)) {
1820 b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, ®);
1824 b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, reg);
1827 b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), &pvlan);
1829 b53_for_each_port(dev, i) {
1836 b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), ®);
1838 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), reg);
1839 dev->ports[i].vlan_ctl_mask = reg;
1847 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), pvlan);
1848 dev->ports[port].vlan_ctl_mask = pvlan;
1850 b53_port_set_learning(dev, port, true);
1858 struct b53_device *dev = ds->priv;
1859 struct b53_vlan *vl = &dev->vlans[0];
1864 b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), &pvlan);
1866 b53_for_each_port(dev, i) {
1871 b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), ®);
1873 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), reg);
1874 dev->ports[port].vlan_ctl_mask = reg;
1881 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), pvlan);
1882 dev->ports[port].vlan_ctl_mask = pvlan;
1884 pvid = b53_default_pvid(dev);
1887 if (is58xx(dev)) {
1888 b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, ®);
1892 b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, reg);
1894 b53_get_vlan_entry(dev, pvid, vl);
1897 b53_set_vlan_entry(dev, pvid, vl);
1899 b53_port_set_learning(dev, port, false);
1905 struct b53_device *dev = ds->priv;
1926 dev_err(ds->dev, "invalid STP state: %d\n", state);
1930 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), ®);
1933 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), reg);
1939 struct b53_device *dev = ds->priv;
1941 if (b53_fast_age_port(dev, port))
1942 dev_err(ds->dev, "fast ageing failed\n");
1949 struct b53_device *dev = ds->priv;
1952 b53_read16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, &uc);
1957 b53_write16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, uc);
1959 b53_read16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, &mc);
1964 b53_write16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, mc);
1966 b53_read16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, &mc);
1971 b53_write16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, mc);
1999 dev_warn(ds->dev, "Port %d is not Broadcom tag capable\n",
2007 dev_warn(ds->dev,
2022 struct b53_device *dev = ds->priv;
2027 if (is5325(dev) || is5365(dev) ||
2029 dev->tag_protocol = DSA_TAG_PROTO_NONE;
2036 if (dev->chip_id == BCM58XX_DEVICE_ID && port == B53_CPU_PORT) {
2037 dev->tag_protocol = DSA_TAG_PROTO_BRCM_PREPEND;
2041 dev->tag_protocol = DSA_TAG_PROTO_BRCM;
2043 return dev->tag_protocol;
2050 struct b53_device *dev = ds->priv;
2058 b53_read16(dev, B53_MGMT_PAGE, loc, ®);
2060 b53_write16(dev, B53_MGMT_PAGE, loc, reg);
2062 b53_read16(dev, B53_MGMT_PAGE, B53_MIR_CAP_CTL, ®);
2066 b53_write16(dev, B53_MGMT_PAGE, B53_MIR_CAP_CTL, reg);
2075 struct b53_device *dev = ds->priv;
2085 b53_read16(dev, B53_MGMT_PAGE, loc, ®);
2089 b53_write16(dev, B53_MGMT_PAGE, loc, reg);
2095 b53_read16(dev, B53_MGMT_PAGE, B53_EG_MIR_CTL, ®);
2097 b53_read16(dev, B53_MGMT_PAGE, B53_IG_MIR_CTL, ®);
2101 b53_read16(dev, B53_MGMT_PAGE, B53_MIR_CAP_CTL, ®);
2107 b53_write16(dev, B53_MGMT_PAGE, B53_MIR_CAP_CTL, reg);
2113 struct b53_device *dev = ds->priv;
2116 b53_read16(dev, B53_EEE_PAGE, B53_EEE_EN_CTRL, ®);
2121 b53_write16(dev, B53_EEE_PAGE, B53_EEE_EN_CTRL, reg);
2144 struct b53_device *dev = ds->priv;
2145 struct ethtool_eee *p = &dev->ports[port].eee;
2148 if (is5325(dev) || is5365(dev))
2151 b53_read16(dev, B53_EEE_PAGE, B53_EEE_LPI_INDICATE, ®);
2161 struct b53_device *dev = ds->priv;
2162 struct ethtool_eee *p = &dev->ports[port].eee;
2164 if (is5325(dev) || is5365(dev))
2176 struct b53_device *dev = ds->priv;
2180 if (is5325(dev) || is5365(dev))
2184 allow_10_100 = (dev->chip_id == BCM583XX_DEVICE_ID);
2186 return b53_set_jumbo(dev, enable_jumbo, allow_10_100);
2521 static int b53_switch_init(struct b53_device *dev)
2529 if (chip->chip_id == dev->chip_id) {
2530 if (!dev->enabled_ports)
2531 dev->enabled_ports = chip->enabled_ports;
2532 dev->name = chip->dev_name;
2533 dev->duplex_reg = chip->duplex_reg;
2534 dev->vta_regs[0] = chip->vta_regs[0];
2535 dev->vta_regs[1] = chip->vta_regs[1];
2536 dev->vta_regs[2] = chip->vta_regs[2];
2537 dev->jumbo_pm_reg = chip->jumbo_pm_reg;
2538 dev->imp_port = chip->imp_port;
2539 dev->cpu_port = chip->cpu_port;
2540 dev->num_vlans = chip->vlans;
2541 dev->num_arl_bins = chip->arl_bins;
2542 dev->num_arl_buckets = chip->arl_buckets;
2548 if (is5325(dev)) {
2551 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
2560 dev->enabled_ports &= ~BIT(4);
2571 } else if (dev->chip_id == BCM53115_DEVICE_ID) {
2574 b53_read48(dev, B53_STAT_PAGE, B53_STRAP_VALUE, &strap_value);
2577 dev->cpu_port = 5;
2580 dev->enabled_ports |= BIT(dev->cpu_port);
2581 dev->num_ports = fls(dev->enabled_ports);
2583 dev->ds->num_ports = min_t(unsigned int, dev->num_ports, DSA_MAX_PORTS);
2586 if (is539x(dev) || is531x5(dev)) {
2587 for (i = 0; i < dev->num_ports; i++) {
2588 if (!(dev->ds->phys_mii_mask & BIT(i)) &&
2589 !b53_possible_cpu_port(dev->ds, i))
2590 dev->ds->phys_mii_mask |= BIT(i);
2594 dev->ports = devm_kcalloc(dev->dev,
2595 dev->num_ports, sizeof(struct b53_port),
2597 if (!dev->ports)
2600 dev->vlans = devm_kcalloc(dev->dev,
2601 dev->num_vlans, sizeof(struct b53_vlan),
2603 if (!dev->vlans)
2606 dev->reset_gpio = b53_switch_get_reset_gpio(dev);
2607 if (dev->reset_gpio >= 0) {
2608 ret = devm_gpio_request_one(dev->dev, dev->reset_gpio,
2622 struct b53_device *dev;
2628 ds->dev = base;
2630 dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);
2631 if (!dev)
2634 ds->priv = dev;
2635 dev->dev = base;
2637 dev->ds = ds;
2638 dev->priv = priv;
2639 dev->ops = ops;
2643 dev->vlan_enabled = ds->configure_vlan_while_not_filtering;
2651 mutex_init(&dev->reg_mutex);
2652 mutex_init(&dev->stats_mutex);
2654 return dev;
2658 int b53_switch_detect(struct b53_device *dev)
2665 ret = b53_read8(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id8);
2678 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);
2679 b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &tmp);
2682 dev->chip_id = BCM5325_DEVICE_ID;
2684 dev->chip_id = BCM5365_DEVICE_ID;
2690 dev->chip_id = id8;
2693 ret = b53_read32(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id32);
2706 dev->chip_id = id32;
2709 dev_err(dev->dev,
2716 if (dev->chip_id == BCM5325_DEVICE_ID)
2717 return b53_read8(dev, B53_STAT_PAGE, B53_REV_ID_25,
2718 &dev->core_rev);
2720 return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID,
2721 &dev->core_rev);
2725 int b53_switch_register(struct b53_device *dev)
2729 if (dev->pdata) {
2730 dev->chip_id = dev->pdata->chip_id;
2731 dev->enabled_ports = dev->pdata->enabled_ports;
2734 if (!dev->chip_id && b53_switch_detect(dev))
2737 ret = b53_switch_init(dev);
2741 dev_info(dev->dev, "found switch: %s, rev %i\n",
2742 dev->name, dev->core_rev);
2744 return dsa_register_switch(dev->ds);