Lines Matching defs:write_reg
189 * @write_reg: For writing data to CAN registers
205 void (*write_reg)(const struct xcan_priv *priv, enum xcan_reg reg,
365 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK);
421 priv->write_reg(priv, XCAN_BRPR_OFFSET, btr0);
422 priv->write_reg(priv, XCAN_BTR_OFFSET, btr1);
438 priv->write_reg(priv, XCAN_F_BRPR_OFFSET, btr0);
439 priv->write_reg(priv, XCAN_F_BTR_OFFSET, btr1);
490 priv->write_reg(priv, XCAN_IER_OFFSET, ier);
502 priv->write_reg(priv, XCAN_AFR_EXT_OFFSET, 0x00000001);
504 priv->write_reg(priv, XCAN_MSR_OFFSET, reg_msr);
505 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_CEN_MASK);
601 priv->write_reg(priv, XCAN_FRAME_ID_OFFSET(frame_offset), id);
605 priv->write_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_offset), dlc);
611 priv->write_reg(priv, ramoff,
622 priv->write_reg(priv,
628 priv->write_reg(priv,
658 priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXFEMP_MASK);
691 priv->write_reg(priv, XCAN_TRR_OFFSET, BIT(XCAN_TX_MAILBOX_IDX));
996 priv->write_reg(priv, XCAN_ESR_OFFSET, err_status);
1002 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK);
1146 priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_RXOK_MASK);
1206 priv->write_reg(priv, XCAN_FSR_OFFSET,
1212 priv->write_reg(priv, XCAN_ICR_OFFSET,
1225 priv->write_reg(priv, XCAN_IER_OFFSET, ier);
1256 priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK);
1279 priv->write_reg(priv, XCAN_ICR_OFFSET,
1290 priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK);
1334 priv->write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_SLP_MASK |
1348 priv->write_reg(priv, XCAN_ICR_OFFSET, isr_errors);
1356 priv->write_reg(priv, XCAN_IER_OFFSET, ier);
1794 priv->write_reg = xcan_write_reg_le;
1806 priv->write_reg = xcan_write_reg_be;
1825 priv->write_reg(priv, XCAN_AFR_2_ID_OFFSET, 0x00000000);
1826 priv->write_reg(priv, XCAN_AFR_2_MASK_OFFSET, 0x00000000);