Lines Matching refs:grcan_write_reg

324 static inline void grcan_write_reg(u32 __iomem *reg, u32 val)
334 static inline void grcan_write_reg(u32 __iomem *reg, u32 val)
342 	grcan_write_reg(reg, grcan_read_reg(reg) & ~mask);
347 	grcan_write_reg(reg, grcan_read_reg(reg) | mask);
359 	grcan_write_reg(reg, (old & ~mask) | (value & mask));
469 	grcan_write_reg(&regs->conf, config);
475 	grcan_write_reg(&regs->rxmask, 0);
484 	grcan_write_reg(&regs->imr, GRCAN_IRQ_NONE);
560 		grcan_write_reg(&regs->txrd, txrd);
773 	grcan_write_reg(&regs->picr, sources);
841 		grcan_write_reg(&regs->txaddr, txaddr);
842 		grcan_write_reg(&regs->txsize, txsize);
843 		grcan_write_reg(&regs->txwr, txwr);
844 		grcan_write_reg(&regs->txrd, txrd);
847 		grcan_write_reg(&regs->rxaddr, rxaddr);
848 		grcan_write_reg(&regs->rxsize, rxsize);
849 		grcan_write_reg(&regs->rxwr, rxwr);
850 		grcan_write_reg(&regs->rxrd, rxrd);
853 		grcan_write_reg(&regs->imr, imr);
855 		grcan_write_reg(&regs->txctrl, GRCAN_TXCTRL_ENABLE
858 		grcan_write_reg(&regs->rxctrl, GRCAN_RXCTRL_ENABLE);
859 		grcan_write_reg(&regs->ctrl, GRCAN_CTRL_ENABLE);
983 	grcan_write_reg(&regs->txaddr, priv->dma.tx.handle);
984 	grcan_write_reg(&regs->txsize, priv->dma.tx.size);
987 	grcan_write_reg(&regs->rxaddr, priv->dma.rx.handle);
988 	grcan_write_reg(&regs->rxsize, priv->dma.rx.size);
993 	grcan_write_reg(&regs->imr, GRCAN_IRQ_DEFAULT);
1008 	grcan_write_reg(&regs->txctrl, txctrl);
1009 	grcan_write_reg(&regs->rxctrl, GRCAN_RXCTRL_ENABLE);
1010 	grcan_write_reg(&regs->ctrl, GRCAN_CTRL_ENABLE);
1232 		grcan_write_reg(&regs->rxrd, rd);
1454 	grcan_write_reg(&regs->txwr,
1640 	grcan_write_reg(&regs->ctrl, GRCAN_CTRL_RESET);