Lines Matching defs:timing
409 u32 timing = 0;
436 timing |= (bpr << GRCAN_CONF_BPR_BIT) & GRCAN_CONF_BPR;
437 timing |= (rsj << GRCAN_CONF_RSJ_BIT) & GRCAN_CONF_RSJ;
438 timing |= (ps1 << GRCAN_CONF_PS1_BIT) & GRCAN_CONF_PS1;
439 timing |= (ps2 << GRCAN_CONF_PS2_BIT) & GRCAN_CONF_PS2;
440 timing |= (scaler << GRCAN_CONF_SCALER_BIT) & GRCAN_CONF_SCALER;
441 netdev_info(dev, "setting timing=0x%x\n", timing);
442 grcan_write_bits(®s->conf, timing, GRCAN_CONF_TIMING);
1637 /* Reset device to allow bit-timing to be set. No need to call