Lines Matching defs:ctl
39 u8 ctl0; /* offset in regs of ctl for CE0 */
95 void __iomem *ctl; /* control register */
280 u32 ctl = chip->ctl_val[smc_base];
288 ctl |= CONTROL_COMMAND_MODE_USER |
290 writel(ctl, chip->ctl);
292 ctl &= ~CONTROL_CE_STOP_ACTIVE_CONTROL;
293 writel(ctl, chip->ctl);
300 u32 ctl = chip->ctl_val[smc_read];
301 u32 ctl2 = ctl | CONTROL_COMMAND_MODE_USER |
304 writel(ctl2, chip->ctl); /* stop user CE control */
305 writel(ctl, chip->ctl); /* default to fread or read mode */
678 reg = readl(chip->ctl);
809 chip->ctl = controller->regs + info->ctl0 + cs * 4;