Lines Matching defs:ecc
73 /* new oob placement block for use with hardware ecc generation
100 .ecc = s3c2410_ooblayout_ecc,
628 pr_debug("%s: returning ecc %*phN\n", __func__, 3, ecc_code);
638 unsigned long ecc = readl(info->regs + S3C2412_NFMECC0);
640 ecc_code[0] = ecc;
641 ecc_code[1] = ecc >> 8;
642 ecc_code[2] = ecc >> 16;
644 pr_debug("%s: returning ecc %*phN\n", __func__, 3, ecc_code);
654 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
656 ecc_code[0] = ecc;
657 ecc_code[1] = ecc >> 8;
658 ecc_code[2] = ecc >> 16;
660 pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
907 chip->ecc.engine_type = info->platform->engine_type;
932 switch (chip->ecc.engine_type) {
941 * to NAND_ECC_ENGINE_TYPE_SOFT. Force ecc.algo to
945 chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
950 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
951 chip->ecc.correct = s3c2410_nand_correct_data;
952 chip->ecc.strength = 1;
956 chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
957 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
961 chip->ecc.hwctl = s3c2412_nand_enable_hwecc;
962 chip->ecc.calculate = s3c2412_nand_calculate_ecc;
966 chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
967 chip->ecc.calculate = s3c2440_nand_calculate_ecc;
977 chip->ecc.size = 256;
978 chip->ecc.bytes = 3;
980 chip->ecc.size = 512;
981 chip->ecc.bytes = 3;