Lines Matching defs:read
173 /* we read at most 3 registers per codeword scan */
197 /* Returns the dma address for reg read buffer */
340 * @data_buffer: our local DMA buffer for page read/writes,
346 * @reg_read_dma: contains dma address for register read buffer
347 * @reg_read_pos: marker for data read in reg_read_buf
420 * upcoming read/write
674 * update_rw_regs: set up read/write register values, these will be
677 * @num_cw: number of steps for the read/write operation
678 * @read: read or write operation
680 static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read)
686 if (read) {
718 if (read)
807 static int prep_bam_dma_desc_cmd(struct qcom_nand_controller *nandc, bool read,
820 if (read)
862 static int prep_bam_dma_desc_data(struct qcom_nand_controller *nandc, bool read,
869 if (read) {
893 static int prep_adm_dma_desc(struct qcom_nand_controller *nandc, bool read,
912 if (read) {
929 if (read) {
964 * read_reg_dma: prepares a descriptor to read a given number of
968 * @num_regs: number of registers to read
1061 * @vaddr: virtual address of the buffer we want to read from
1163 * in use. we configure the controller to perform a raw read of 512
1164 * bytes to read onfi params
1358 /* reset the register read buffer for next NAND operation */
1384 * privately maintained status byte, this status byte can be read after
1471 /* we read the entire page for now */
1512 * when using BCH ECC, the HW flags an error in NAND_FLASH_STATUS if it read
1584 /* performs raw read for one codeword */
1645 dev_err(nandc->dev, "failure to read raw cw %d\n", cw);
1662 * 2. Perform raw read for all the CW which has uncorrectable errors.
1724 * reads back status registers set by the controller to notify page read
1779 * complete page is read i.e. data_buf is not NULL.
1794 * EIO will be returned for page read.
1828 * helper to perform the actual page read operation, used by ecc->read_page(),
1875 * when ecc is enabled, the controller doesn't read the real
1901 dev_err(nandc->dev, "failure to read page/oob\n");
1924 /* prepare a clean read buffer */
2203 * configure registers for a raw sub page read, the address is set to
2216 dev_warn(nandc->dev, "error when trying to read BBM\n");
2408 * This layout is read as is when ECC is disabled. When ECC is enabled, the
2410 * and assumed as 0xffs when we read a page/oob. The ECC, unused and
2562 * DATA_UD_BYTES varies based on whether the read/write command protects
2669 * data like ID and status, and preforming read-copy-write operations
2730 * Initially allocate BAM transaction to read ONFI param page.
2783 * access to operational registers are read only
2833 * the bad block marker is readable only when we read the last codeword
2835 * helpers don't allow us to read BB from a nand chip with ECC