Lines Matching defs:command
227 * @bam_ce - the array of BAM command elements
228 * @cmd_sgl - sgl for NAND BAM command pipe
234 * @cmd_sgl_pos - current index in command sgl.
235 * @cmd_sgl_start - start index in command sgl.
244 * @last_cmd_desc - last DMA desc in command channel.
336 * @cmd_crci: ADM DMA CRCI for command flow control
424 * @status: value to be returned if NAND_CMD_STATUS command
426 * @last_command: keeps track of last command on this chip. used
550 * One for command channel and another one for data channel.
787 /* update last data/command descriptor */
799 * Prepares the command descriptor for BAM DMA which will be used for NAND
800 * register reads and writes. The command descriptor requires the command
801 * to be formed in command element type so this function uses the command
803 * data. A single SGL can contain multiple command elements so
805 * after the current command element.
818 /* fill the command desc */
835 /* use the separate sgl after this command */
1365 static void pre_command(struct qcom_nand_host *host, int command)
1373 host->last_command = command;
1377 if (command == NAND_CMD_RESET || command == NAND_CMD_READID ||
1378 command == NAND_CMD_PARAM || command == NAND_CMD_ERASE1)
1387 static void parse_erase_write_errors(struct qcom_nand_host *host, int command)
1395 num_cw = command == NAND_CMD_PAGEPROG ? ecc->steps : 1;
1411 static void post_command(struct qcom_nand_host *host, int command)
1416 switch (command) {
1424 parse_erase_write_errors(host, command);
1437 static void qcom_nandc_command(struct nand_chip *chip, unsigned int command,
1446 pre_command(host, command);
1448 switch (command) {
1492 dev_err(nandc->dev, "failure executing command %d\n",
1493 command);
1502 "failure submitting descs for command %d\n",
1503 command);
1508 post_command(host, command);
2562 * DATA_UD_BYTES varies based on whether the read/write command protects
2908 dev_err(nandc->dev, "command CRCI unspecified\n");