Lines Matching refs:sdr
884 iface->timings.sdr = *spec_timings;
1009 const struct nand_sdr_timings *sdr =
1015 NAND_OP_ADDR(3, addrs, PSEC_TO_NSEC(sdr->tWB_max)),
1016 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max),
1017 PSEC_TO_NSEC(sdr->tRR_min)),
1052 const struct nand_sdr_timings *sdr =
1058 NAND_OP_CMD(NAND_CMD_READSTART, PSEC_TO_NSEC(sdr->tWB_max)),
1059 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max),
1060 PSEC_TO_NSEC(sdr->tRR_min)),
1149 const struct nand_sdr_timings *sdr =
1153 NAND_OP_ADDR(1, &page, PSEC_TO_NSEC(sdr->tWB_max)),
1154 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max),
1155 PSEC_TO_NSEC(sdr->tRR_min)),
1204 const struct nand_sdr_timings *sdr =
1211 PSEC_TO_NSEC(sdr->tCCS_min)),
1279 const struct nand_sdr_timings *sdr =
1291 NAND_OP_ADDR(0, addrs, PSEC_TO_NSEC(sdr->tADL_min)),
1293 NAND_OP_CMD(NAND_CMD_PAGEPROG, PSEC_TO_NSEC(sdr->tWB_max)),
1294 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tPROG_max), 0),
1403 const struct nand_sdr_timings *sdr =
1407 PSEC_TO_NSEC(sdr->tWB_max)),
1408 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tPROG_max), 0),
1510 const struct nand_sdr_timings *sdr =
1515 NAND_OP_ADDR(2, addrs, PSEC_TO_NSEC(sdr->tCCS_min)),
1565 const struct nand_sdr_timings *sdr =
1569 NAND_OP_ADDR(1, &addr, PSEC_TO_NSEC(sdr->tADL_min)),
1604 const struct nand_sdr_timings *sdr =
1608 PSEC_TO_NSEC(sdr->tADL_min)),
1673 const struct nand_sdr_timings *sdr =
1680 PSEC_TO_MSEC(sdr->tWB_max)),
1681 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tBERS_max), 0),
1732 const struct nand_sdr_timings *sdr =
1736 NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tADL_min)),
1738 PSEC_TO_NSEC(sdr->tWB_max)),
1739 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tFEAT_max), 0),
1779 const struct nand_sdr_timings *sdr =
1783 NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tWB_max)),
1784 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tFEAT_max),
1785 PSEC_TO_NSEC(sdr->tRR_min)),
1836 const struct nand_sdr_timings *sdr =
1839 NAND_OP_CMD(NAND_CMD_RESET, PSEC_TO_NSEC(sdr->tWB_max)),
1840 NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tRST_max), 0),
3098 const struct nand_sdr_timings *sdr;
3103 sdr = nand_get_sdr_timings(nand_get_interface_config(chip));
3104 WARN_ON(nand_wait_rdy_op(chip, PSEC_TO_MSEC(sdr->tR_max), 0));