Lines Matching refs:chip
99 static int check_offs_len(struct nand_chip *chip, loff_t ofs, uint64_t len)
104 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {
110 if (len & ((1ULL << chip->phys_erase_shift) - 1)) {
164 * @chip: NAND chip object
165 * @cs: the CS line to select. Note that this CS id is always from the chip
168 * Select a NAND target so that further operations executed on @chip go to the
171 void nand_select_target(struct nand_chip *chip, unsigned int cs)
177 if (WARN_ON(cs > nanddev_ntargets(&chip->base)))
180 chip->cur_cs = cs;
182 if (chip->legacy.select_chip)
183 chip->legacy.select_chip(chip, cs);
189 * @chip: NAND chip object
192 * executed on @chip after the target has been deselected is undefined.
194 void nand_deselect_target(struct nand_chip *chip)
196 if (chip->legacy.select_chip)
197 chip->legacy.select_chip(chip, -1);
199 chip->cur_cs = -1;
204 * nand_release_device - [GENERIC] release chip
205 * @chip: NAND chip object
207 * Release chip lock and wake up anyone waiting on the device.
209 static void nand_release_device(struct nand_chip *chip)
211 /* Release the controller and the chip */
212 mutex_unlock(&chip->controller->lock);
213 mutex_unlock(&chip->lock);
218 * @chip: NAND chip object
225 int nand_bbm_get_next_page(struct nand_chip *chip, int page)
227 struct mtd_info *mtd = nand_to_mtd(chip);
229 chip->page_shift) & chip->pagemask;
233 if (page == 0 && !(chip->options & bbm_flags))
235 if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE)
237 if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE)
239 if (page <= last_page && chip->options & NAND_BBM_LASTPAGE)
246 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
247 * @chip: NAND chip object
252 static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
258 first_page = (int)(ofs >> chip->page_shift) & chip->pagemask;
259 page_offset = nand_bbm_get_next_page(chip, 0);
262 res = chip->ecc.read_oob(chip, first_page + page_offset);
266 bad = chip->oob_poi[chip->badblockpos];
268 if (likely(chip->badblockbits == 8))
271 res = hweight8(bad) < chip->badblockbits;
275 page_offset = nand_bbm_get_next_page(chip, page_offset + 1);
281 static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
283 if (chip->options & NAND_NO_BBM_QUIRK)
286 if (chip->legacy.block_bad)
287 return chip->legacy.block_bad(chip, ofs);
289 return nand_block_bad(chip, ofs);
293 * nand_get_device - [GENERIC] Get chip for selected access
294 * @chip: NAND chip structure
298 * Return: -EBUSY if the chip has been suspended, 0 otherwise
300 static void nand_get_device(struct nand_chip *chip)
304 mutex_lock(&chip->lock);
305 if (!chip->suspended) {
306 mutex_lock(&chip->controller->lock);
309 mutex_unlock(&chip->lock);
311 wait_event(chip->resume_wq, !chip->suspended);
316 * nand_check_wp - [GENERIC] check if the chip is write protected
317 * @chip: NAND chip object
322 static int nand_check_wp(struct nand_chip *chip)
328 if (chip->options & NAND_BROKEN_XD)
332 ret = nand_status_op(chip, &status);
341 * @chip: NAND chip object
346 static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, size_t len,
349 struct mtd_info *mtd = nand_to_mtd(chip);
356 memset(chip->oob_poi, 0xff, mtd->oobsize);
362 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
366 ret = mtd_ooblayout_set_databytes(mtd, oob, chip->oob_poi,
379 * @chip: NAND chip object
385 static int nand_do_write_oob(struct nand_chip *chip, loff_t to,
388 struct mtd_info *mtd = nand_to_mtd(chip);
403 chipnr = (int)(to >> chip->chip_shift);
406 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
411 ret = nand_reset(chip, chipnr);
415 nand_select_target(chip, chipnr);
418 page = (int)(to >> chip->page_shift);
421 if (nand_check_wp(chip)) {
422 nand_deselect_target(chip);
427 if (page == chip->pagecache.page)
428 chip->pagecache.page = -1;
430 nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops);
433 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask);
435 status = chip->ecc.write_oob(chip, page & chip->pagemask);
437 nand_deselect_target(chip);
449 * @chip: NAND chip object
456 static int nand_default_block_markbad(struct nand_chip *chip, loff_t ofs)
458 struct mtd_info *mtd = nand_to_mtd(chip);
465 ops.ooboffs = chip->badblockpos;
466 if (chip->options & NAND_BUSWIDTH_16) {
474 page_offset = nand_bbm_get_next_page(chip, 0);
477 res = nand_do_write_oob(chip,
484 page_offset = nand_bbm_get_next_page(chip, page_offset + 1);
492 * @chip: NAND chip object
495 int nand_markbad_bbm(struct nand_chip *chip, loff_t ofs)
497 if (chip->legacy.block_markbad)
498 return chip->legacy.block_markbad(chip, ofs);
500 return nand_default_block_markbad(chip, ofs);
505 * @chip: NAND chip object
510 * specify how to write bad block markers to OOB (chip->legacy.block_markbad).
522 static int nand_block_markbad_lowlevel(struct nand_chip *chip, loff_t ofs)
524 struct mtd_info *mtd = nand_to_mtd(chip);
527 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {
533 einfo.len = 1ULL << chip->phys_erase_shift;
534 nand_erase_nand(chip, &einfo, 0);
537 nand_get_device(chip);
539 ret = nand_markbad_bbm(chip, ofs);
540 nand_release_device(chip);
544 if (chip->bbt) {
545 res = nand_markbad_bbt(chip, ofs);
565 struct nand_chip *chip = mtd_to_nand(mtd);
567 if (!chip->bbt)
570 return nand_isreserved_bbt(chip, ofs);
575 * @chip: NAND chip object
582 static int nand_block_checkbad(struct nand_chip *chip, loff_t ofs, int allowbbt)
585 if (chip->bbt)
586 return nand_isbad_bbt(chip, ofs, allowbbt);
588 return nand_isbad_bbm(chip, ofs);
593 * @chip: NAND chip structure
606 * Return 0 if the NAND chip is ready, a negative error otherwise.
608 int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms)
614 if (!nand_has_exec_op(chip))
618 timings = nand_get_sdr_timings(nand_get_interface_config(chip));
621 ret = nand_status_op(chip, NULL);
632 ret = nand_read_data_op(chip, &status, sizeof(status), true,
653 nand_exit_status_op(chip);
664 * @chip: NAND chip structure
674 * Return 0 if the R/B pin indicates chip is ready, a negative error otherwise.
676 int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod,
681 * Wait until R/B pin indicates chip is ready or timeout occurs.
700 * @chip: NAND chip structure
707 void panic_nand_wait(struct nand_chip *chip, unsigned long timeo)
711 if (chip->legacy.dev_ready) {
712 if (chip->legacy.dev_ready(chip))
718 ret = nand_read_data_op(chip, &status, sizeof(status),
730 static bool nand_supports_get_features(struct nand_chip *chip, int addr)
732 return (chip->parameters.supports_set_get_features &&
733 test_bit(addr, chip->parameters.get_feature_list));
736 static bool nand_supports_set_features(struct nand_chip *chip, int addr)
738 return (chip->parameters.supports_set_get_features &&
739 test_bit(addr, chip->parameters.set_feature_list));
744 * @chip: The NAND chip
751 static int nand_reset_interface(struct nand_chip *chip, int chipnr)
753 const struct nand_controller_ops *ops = chip->controller->ops;
756 if (!nand_controller_can_setup_interface(chip))
773 chip->current_interface_config = nand_get_reset_interface_config();
774 ret = ops->setup_interface(chip, chipnr,
775 chip->current_interface_config);
784 * @chip: The NAND chip
788 * timings supported by the chip and the driver.
792 static int nand_setup_interface(struct nand_chip *chip, int chipnr)
794 const struct nand_controller_ops *ops = chip->controller->ops;
798 if (!nand_controller_can_setup_interface(chip))
802 * A nand_reset_interface() put both the NAND chip and the NAND
803 * controller in timings mode 0. If the default mode for this chip is
808 if (!chip->best_interface_config)
811 tmode_param[0] = chip->best_interface_config->timings.mode;
813 /* Change the mode on the chip side (if supported by the NAND chip) */
814 if (nand_supports_set_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE)) {
815 nand_select_target(chip, chipnr);
816 ret = nand_set_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE,
818 nand_deselect_target(chip);
824 ret = ops->setup_interface(chip, chipnr, chip->best_interface_config);
828 /* Check the mode has been accepted by the chip, if supported */
829 if (!nand_supports_get_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE))
833 nand_select_target(chip, chipnr);
834 ret = nand_get_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE,
836 nand_deselect_target(chip);
840 if (tmode_param[0] != chip->best_interface_config->timings.mode) {
841 pr_warn("timing mode %d not acknowledged by the NAND chip\n",
842 chip->best_interface_config->timings.mode);
847 chip->current_interface_config = chip->best_interface_config;
853 * Fallback to mode 0 if the chip explicitly did not ack the chosen
856 nand_reset_interface(chip, chipnr);
857 nand_select_target(chip, chipnr);
858 nand_reset_op(chip);
859 nand_deselect_target(chip);
866 * NAND controller and the NAND chip support
867 * @chip: the NAND chip
874 int nand_choose_best_sdr_timings(struct nand_chip *chip,
878 const struct nand_controller_ops *ops = chip->controller->ops;
888 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY,
891 chip->best_interface_config = iface;
897 } else if (chip->parameters.onfi) {
898 best_mode = fls(chip->parameters.onfi->async_timing_mode) - 1;
902 onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, mode);
904 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY,
910 chip->best_interface_config = iface;
917 * @chip: The NAND chip
919 * Find the best data interface and NAND timings supported by the chip
928 static int nand_choose_interface_config(struct nand_chip *chip)
933 if (!nand_controller_can_setup_interface(chip))
940 if (chip->ops.choose_interface_config)
941 ret = chip->ops.choose_interface_config(chip, iface);
943 ret = nand_choose_best_sdr_timings(chip, iface, NULL);
953 * @chip: The NAND chip
963 static int nand_fill_column_cycles(struct nand_chip *chip, u8 *addrs,
966 struct mtd_info *mtd = nand_to_mtd(chip);
984 if (chip->options & NAND_BUSWIDTH_16) {
1005 static int nand_sp_exec_read_page_op(struct nand_chip *chip, unsigned int page,
1010 nand_get_sdr_timings(nand_get_interface_config(chip));
1011 struct mtd_info *mtd = nand_to_mtd(chip);
1020 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1030 !(chip->options & NAND_BUSWIDTH_16))
1033 ret = nand_fill_column_cycles(chip, addrs, offset_in_page);
1040 if (chip->options & NAND_ROW_ADDR_3) {
1045 return nand_exec_op(chip, &op);
1048 static int nand_lp_exec_read_page_op(struct nand_chip *chip, unsigned int page,
1053 nand_get_sdr_timings(nand_get_interface_config(chip));
1063 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1070 ret = nand_fill_column_cycles(chip, addrs, offset_in_page);
1077 if (chip->options & NAND_ROW_ADDR_3) {
1082 return nand_exec_op(chip, &op);
1087 * @chip: The NAND chip
1098 int nand_read_page_op(struct nand_chip *chip, unsigned int page,
1101 struct mtd_info *mtd = nand_to_mtd(chip);
1109 if (nand_has_exec_op(chip)) {
1111 return nand_lp_exec_read_page_op(chip, page,
1115 return nand_sp_exec_read_page_op(chip, page, offset_in_page,
1119 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, offset_in_page, page);
1121 chip->legacy.read_buf(chip, buf, len);
1129 * @chip: The NAND chip
1139 int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
1148 if (nand_has_exec_op(chip)) {
1150 nand_get_sdr_timings(nand_get_interface_config(chip));
1158 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1164 return nand_exec_op(chip, &op);
1167 chip->legacy.cmdfunc(chip, NAND_CMD_PARAM, page, -1);
1169 p[i] = chip->legacy.read_byte(chip);
1176 * @chip: The NAND chip
1187 int nand_change_read_column_op(struct nand_chip *chip,
1191 struct mtd_info *mtd = nand_to_mtd(chip);
1203 if (nand_has_exec_op(chip)) {
1205 nand_get_sdr_timings(nand_get_interface_config(chip));
1214 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1217 ret = nand_fill_column_cycles(chip, addrs, offset_in_page);
1227 return nand_exec_op(chip, &op);
1230 chip->legacy.cmdfunc(chip, NAND_CMD_RNDOUT, offset_in_page, -1);
1232 chip->legacy.read_buf(chip, buf, len);
1240 * @chip: The NAND chip
1251 int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
1254 struct mtd_info *mtd = nand_to_mtd(chip);
1262 if (nand_has_exec_op(chip))
1263 return nand_read_page_op(chip, page,
1267 chip->legacy.cmdfunc(chip, NAND_CMD_READOOB, offset_in_oob, page);
1269 chip->legacy.read_buf(chip, buf, len);
1275 static int nand_exec_prog_page_op(struct nand_chip *chip, unsigned int page,
1280 nand_get_sdr_timings(nand_get_interface_config(chip));
1281 struct mtd_info *mtd = nand_to_mtd(chip);
1296 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1297 int naddrs = nand_fill_column_cycles(chip, addrs, offset_in_page);
1306 if (chip->options & NAND_ROW_ADDR_3)
1328 !(chip->options & NAND_BUSWIDTH_16))
1339 ret = nand_exec_op(chip, &op);
1343 ret = nand_status_op(chip, &status);
1352 * @chip: The NAND chip
1363 int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
1367 struct mtd_info *mtd = nand_to_mtd(chip);
1375 if (nand_has_exec_op(chip))
1376 return nand_exec_prog_page_op(chip, page, offset_in_page, buf,
1379 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, page);
1382 chip->legacy.write_buf(chip, buf, len);
1390 * @chip: The NAND chip
1397 int nand_prog_page_end_op(struct nand_chip *chip)
1402 if (nand_has_exec_op(chip)) {
1404 nand_get_sdr_timings(nand_get_interface_config(chip));
1410 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1412 ret = nand_exec_op(chip, &op);
1416 ret = nand_status_op(chip, &status);
1420 chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1);
1421 ret = chip->legacy.waitfunc(chip);
1437 * @chip: The NAND chip
1448 int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
1452 struct mtd_info *mtd = nand_to_mtd(chip);
1461 if (nand_has_exec_op(chip)) {
1462 status = nand_exec_prog_page_op(chip, page, offset_in_page, buf,
1465 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page,
1467 chip->legacy.write_buf(chip, buf, len);
1468 chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1);
1469 status = chip->legacy.waitfunc(chip);
1481 * @chip: The NAND chip
1492 int nand_change_write_column_op(struct nand_chip *chip,
1497 struct mtd_info *mtd = nand_to_mtd(chip);
1509 if (nand_has_exec_op(chip)) {
1511 nand_get_sdr_timings(nand_get_interface_config(chip));
1518 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1521 ret = nand_fill_column_cycles(chip, addrs, offset_in_page);
1531 return nand_exec_op(chip, &op);
1534 chip->legacy.cmdfunc(chip, NAND_CMD_RNDIN, offset_in_page, -1);
1536 chip->legacy.write_buf(chip, buf, len);
1544 * @chip: The NAND chip
1555 int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
1564 if (nand_has_exec_op(chip)) {
1566 nand_get_sdr_timings(nand_get_interface_config(chip));
1572 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1578 return nand_exec_op(chip, &op);
1581 chip->legacy.cmdfunc(chip, NAND_CMD_READID, addr, -1);
1584 id[i] = chip->legacy.read_byte(chip);
1592 * @chip: The NAND chip
1601 int nand_status_op(struct nand_chip *chip, u8 *status)
1603 if (nand_has_exec_op(chip)) {
1605 nand_get_sdr_timings(nand_get_interface_config(chip));
1611 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1616 return nand_exec_op(chip, &op);
1619 chip->legacy.cmdfunc(chip, NAND_CMD_STATUS, -1, -1);
1621 *status = chip->legacy.read_byte(chip);
1629 * @chip: The NAND chip
1638 int nand_exit_status_op(struct nand_chip *chip)
1640 if (nand_has_exec_op(chip)) {
1644 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1646 return nand_exec_op(chip, &op);
1649 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, -1, -1);
1656 * @chip: The NAND chip
1665 int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
1668 (chip->phys_erase_shift - chip->page_shift);
1672 if (nand_has_exec_op(chip)) {
1674 nand_get_sdr_timings(nand_get_interface_config(chip));
1683 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1685 if (chip->options & NAND_ROW_ADDR_3)
1688 ret = nand_exec_op(chip, &op);
1692 ret = nand_status_op(chip, &status);
1696 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE1, -1, page);
1697 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE2, -1, -1);
1699 ret = chip->legacy.waitfunc(chip);
1715 * @chip: The NAND chip
1725 static int nand_set_features_op(struct nand_chip *chip, u8 feature,
1731 if (nand_has_exec_op(chip)) {
1733 nand_get_sdr_timings(nand_get_interface_config(chip));
1741 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1743 return nand_exec_op(chip, &op);
1746 chip->legacy.cmdfunc(chip, NAND_CMD_SET_FEATURES, feature, -1);
1748 chip->legacy.write_byte(chip, params[i]);
1750 ret = chip->legacy.waitfunc(chip);
1762 * @chip: The NAND chip
1772 static int nand_get_features_op(struct nand_chip *chip, u8 feature,
1778 if (nand_has_exec_op(chip)) {
1780 nand_get_sdr_timings(nand_get_interface_config(chip));
1789 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1791 return nand_exec_op(chip, &op);
1794 chip->legacy.cmdfunc(chip, NAND_CMD_GET_FEATURES, feature, -1);
1796 params[i] = chip->legacy.read_byte(chip);
1801 static int nand_wait_rdy_op(struct nand_chip *chip, unsigned int timeout_ms,
1804 if (nand_has_exec_op(chip)) {
1809 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1811 return nand_exec_op(chip, &op);
1815 if (!chip->legacy.dev_ready)
1816 udelay(chip->legacy.chip_delay);
1818 nand_wait_ready(chip);
1825 * @chip: The NAND chip
1833 int nand_reset_op(struct nand_chip *chip)
1835 if (nand_has_exec_op(chip)) {
1837 nand_get_sdr_timings(nand_get_interface_config(chip));
1842 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1844 return nand_exec_op(chip, &op);
1847 chip->legacy.cmdfunc(chip, NAND_CMD_RESET, -1, -1);
1855 * @chip: The NAND chip
1868 int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len,
1874 if (nand_has_exec_op(chip)) {
1878 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1883 return nand_check_op(chip, &op);
1885 return nand_exec_op(chip, &op);
1896 p[i] = chip->legacy.read_byte(chip);
1898 chip->legacy.read_buf(chip, buf, len);
1907 * @chip: The NAND chip
1918 int nand_write_data_op(struct nand_chip *chip, const void *buf,
1924 if (nand_has_exec_op(chip)) {
1928 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
1932 return nand_exec_op(chip, &op);
1940 chip->legacy.write_byte(chip, p[i]);
1942 chip->legacy.write_buf(chip, buf, len);
2150 * @chip: the NAND chip
2170 int nand_op_parser_exec_op(struct nand_chip *chip,
2212 ret = pattern->exec(chip, &ctx.subop);
2363 * @chip: The NAND chip
2372 int nand_reset(struct nand_chip *chip, int chipnr)
2376 ret = nand_reset_interface(chip, chipnr);
2385 nand_select_target(chip, chipnr);
2386 ret = nand_reset_op(chip);
2387 nand_deselect_target(chip);
2391 ret = nand_setup_interface(chip, chipnr);
2401 * @chip: NAND chip info structure
2408 int nand_get_features(struct nand_chip *chip, int addr,
2411 if (!nand_supports_get_features(chip, addr))
2414 if (chip->legacy.get_features)
2415 return chip->legacy.get_features(chip, addr, subfeature_param);
2417 return nand_get_features_op(chip, addr, subfeature_param);
2422 * @chip: NAND chip info structure
2429 int nand_set_features(struct nand_chip *chip, int addr,
2432 if (!nand_supports_set_features(chip, addr))
2435 if (chip->legacy.set_features)
2436 return chip->legacy.set_features(chip, addr, subfeature_param);
2438 return nand_set_features_op(chip, addr, subfeature_param);
2574 * @chip: nand chip info structure
2576 * @oob_required: caller requires OOB data read to chip->oob_poi
2581 int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf,
2589 * @chip: nand chip info structure
2591 * @oob_required: caller requires OOB data read to chip->oob_poi
2596 int nand_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required,
2599 struct mtd_info *mtd = nand_to_mtd(chip);
2602 ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize);
2607 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize,
2619 * @chip: NAND chip info structure
2621 * @oob_required: caller requires OOB data read to chip->oob_poi
2627 * bus (from the NAND chip to the NAND controller) in a single
2632 int nand_monolithic_read_page_raw(struct nand_chip *chip, u8 *buf,
2635 struct mtd_info *mtd = nand_to_mtd(chip);
2643 if (buf != chip->data_buf)
2644 read_buf = nand_get_data_buf(chip);
2647 ret = nand_read_page_op(chip, page, 0, read_buf, size);
2651 if (buf != chip->data_buf)
2660 * @chip: nand chip info structure
2662 * @oob_required: caller requires OOB data read to chip->oob_poi
2667 static int nand_read_page_raw_syndrome(struct nand_chip *chip, uint8_t *buf,
2670 struct mtd_info *mtd = nand_to_mtd(chip);
2671 int eccsize = chip->ecc.size;
2672 int eccbytes = chip->ecc.bytes;
2673 uint8_t *oob = chip->oob_poi;
2676 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2680 for (steps = chip->ecc.steps; steps > 0; steps--) {
2681 ret = nand_read_data_op(chip, buf, eccsize, false, false);
2687 if (chip->ecc.prepad) {
2688 ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
2693 oob += chip->ecc.prepad;
2696 ret = nand_read_data_op(chip, oob, eccbytes, false, false);
2702 if (chip->ecc.postpad) {
2703 ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
2708 oob += chip->ecc.postpad;
2712 size = mtd->oobsize - (oob - chip->oob_poi);
2714 ret = nand_read_data_op(chip, oob, size, false, false);
2724 * @chip: nand chip info structure
2726 * @oob_required: caller requires OOB data read to chip->oob_poi
2729 static int nand_read_page_swecc(struct nand_chip *chip, uint8_t *buf,
2732 struct mtd_info *mtd = nand_to_mtd(chip);
2733 int i, eccsize = chip->ecc.size, ret;
2734 int eccbytes = chip->ecc.bytes;
2735 int eccsteps = chip->ecc.steps;
2737 uint8_t *ecc_calc = chip->ecc.calc_buf;
2738 uint8_t *ecc_code = chip->ecc.code_buf;
2741 chip->ecc.read_page_raw(chip, buf, 1, page);
2744 chip->ecc.calculate(chip, p, &ecc_calc[i]);
2746 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,
2747 chip->ecc.total);
2751 eccsteps = chip->ecc.steps;
2757 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);
2770 * @chip: nand chip info structure
2776 static int nand_read_subpage(struct nand_chip *chip, uint32_t data_offs,
2779 struct mtd_info *mtd = nand_to_mtd(chip);
2784 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
2790 start_step = data_offs / chip->ecc.size;
2791 end_step = (data_offs + readlen - 1) / chip->ecc.size;
2793 index = start_step * chip->ecc.bytes;
2796 datafrag_len = num_steps * chip->ecc.size;
2797 eccfrag_len = num_steps * chip->ecc.bytes;
2799 data_col_addr = start_step * chip->ecc.size;
2802 ret = nand_read_page_op(chip, page, data_col_addr, p, datafrag_len);
2807 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
2808 chip->ecc.calculate(chip, p, &chip->ecc.calc_buf[i]);
2822 ret = nand_change_read_column_op(chip, mtd->writesize,
2823 chip->oob_poi, mtd->oobsize,
2836 if ((oobregion.offset + (num_steps * chip->ecc.bytes)) &
2840 ret = nand_change_read_column_op(chip,
2842 &chip->oob_poi[aligned_pos],
2848 ret = mtd_ooblayout_get_eccbytes(mtd, chip->ecc.code_buf,
2849 chip->oob_poi, index, eccfrag_len);
2854 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
2857 stat = chip->ecc.correct(chip, p, &chip->ecc.code_buf[i],
2858 &chip->ecc.calc_buf[i]);
2860 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
2862 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,
2863 &chip->ecc.code_buf[i],
2864 chip->ecc.bytes,
2866 chip->ecc.strength);
2881 * @chip: nand chip info structure
2883 * @oob_required: caller requires OOB data read to chip->oob_poi
2888 static int nand_read_page_hwecc(struct nand_chip *chip, uint8_t *buf,
2891 struct mtd_info *mtd = nand_to_mtd(chip);
2892 int i, eccsize = chip->ecc.size, ret;
2893 int eccbytes = chip->ecc.bytes;
2894 int eccsteps = chip->ecc.steps;
2896 uint8_t *ecc_calc = chip->ecc.calc_buf;
2897 uint8_t *ecc_code = chip->ecc.code_buf;
2900 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2905 chip->ecc.hwctl(chip, NAND_ECC_READ);
2907 ret = nand_read_data_op(chip, p, eccsize, false, false);
2911 chip->ecc.calculate(chip, p, &ecc_calc[i]);
2914 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false,
2919 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,
2920 chip->ecc.total);
2924 eccsteps = chip->ecc.steps;
2930 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);
2932 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
2937 chip->ecc.strength);
2952 * @chip: nand chip info structure
2954 * @oob_required: caller requires OOB data read to chip->oob_poi
2960 static int nand_read_page_syndrome(struct nand_chip *chip, uint8_t *buf,
2963 struct mtd_info *mtd = nand_to_mtd(chip);
2964 int ret, i, eccsize = chip->ecc.size;
2965 int eccbytes = chip->ecc.bytes;
2966 int eccsteps = chip->ecc.steps;
2967 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
2969 uint8_t *oob = chip->oob_poi;
2972 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2979 chip->ecc.hwctl(chip, NAND_ECC_READ);
2981 ret = nand_read_data_op(chip, p, eccsize, false, false);
2985 if (chip->ecc.prepad) {
2986 ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
2991 oob += chip->ecc.prepad;
2994 chip->ecc.hwctl(chip, NAND_ECC_READSYN);
2996 ret = nand_read_data_op(chip, oob, eccbytes, false, false);
3000 stat = chip->ecc.correct(chip, p, oob, NULL);
3004 if (chip->ecc.postpad) {
3005 ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
3010 oob += chip->ecc.postpad;
3014 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
3016 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,
3020 chip->ecc.strength);
3032 i = mtd->oobsize - (oob - chip->oob_poi);
3034 ret = nand_read_data_op(chip, oob, i, false, false);
3044 * @chip: NAND chip object
3049 static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
3052 struct mtd_info *mtd = nand_to_mtd(chip);
3059 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
3063 ret = mtd_ooblayout_get_databytes(mtd, oob, chip->oob_poi,
3076 * @chip: NAND chip object
3083 static int nand_setup_read_retry(struct nand_chip *chip, int retry_mode)
3087 if (retry_mode >= chip->read_retries)
3090 if (!chip->ops.setup_read_retry)
3093 return chip->ops.setup_read_retry(chip, retry_mode);
3096 static void nand_wait_readrdy(struct nand_chip *chip)
3100 if (!(chip->options & NAND_NEED_READRDY))
3103 sdr = nand_get_sdr_timings(nand_get_interface_config(chip));
3104 WARN_ON(nand_wait_rdy_op(chip, PSEC_TO_MSEC(sdr->tR_max), 0));
3109 * @chip: NAND chip object
3113 * Internal function. Called with chip held.
3115 static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
3119 struct mtd_info *mtd = nand_to_mtd(chip);
3131 chipnr = (int)(from >> chip->chip_shift);
3132 nand_select_target(chip, chipnr);
3134 realpage = (int)(from >> chip->page_shift);
3135 page = realpage & chip->pagemask;
3151 else if (chip->options & NAND_USES_DMA)
3154 chip->buf_align);
3159 if (realpage != chip->pagecache.page || oob) {
3160 bufpoi = use_bounce_buf ? chip->data_buf : buf;
3172 ret = chip->ecc.read_page_raw(chip, bufpoi,
3175 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
3177 ret = chip->ecc.read_subpage(chip, col, bytes,
3180 ret = chip->ecc.read_page(chip, bufpoi,
3185 chip->pagecache.page = -1;
3194 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
3197 chip->pagecache.page = realpage;
3198 chip->pagecache.bitflips = ret;
3201 chip->pagecache.page = -1;
3210 oob = nand_transfer_oob(chip, oob, ops,
3216 nand_wait_readrdy(chip);
3219 if (retry_mode + 1 < chip->read_retries) {
3221 ret = nand_setup_read_retry(chip,
3238 memcpy(buf, chip->data_buf + col, bytes);
3241 chip->pagecache.bitflips);
3248 ret = nand_setup_read_retry(chip, 0);
3262 page = realpage & chip->pagemask;
3263 /* Check, if we cross a chip boundary */
3266 nand_deselect_target(chip);
3267 nand_select_target(chip, chipnr);
3270 nand_deselect_target(chip);
3287 * @chip: nand chip info structure
3290 int nand_read_oob_std(struct nand_chip *chip, int page)
3292 struct mtd_info *mtd = nand_to_mtd(chip);
3294 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
3301 * @chip: nand chip info structure
3304 static int nand_read_oob_syndrome(struct nand_chip *chip, int page)
3306 struct mtd_info *mtd = nand_to_mtd(chip);
3308 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
3309 int eccsize = chip->ecc.size;
3310 uint8_t *bufpoi = chip->oob_poi;
3313 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);
3317 for (i = 0; i < chip->ecc.steps; i++) {
3323 ret = nand_change_read_column_op(chip, pos,
3327 ret = nand_read_page_op(chip, page, pos, NULL,
3336 ret = nand_read_data_op(chip, bufpoi, toread, false, false);
3344 ret = nand_read_data_op(chip, bufpoi, length, false, false);
3354 * @chip: nand chip info structure
3357 int nand_write_oob_std(struct nand_chip *chip, int page)
3359 struct mtd_info *mtd = nand_to_mtd(chip);
3361 return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
3369 * @chip: nand chip info structure
3372 static int nand_write_oob_syndrome(struct nand_chip *chip, int page)
3374 struct mtd_info *mtd = nand_to_mtd(chip);
3375 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
3376 int eccsize = chip->ecc.size, length = mtd->oobsize;
3377 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps;
3378 const uint8_t *bufpoi = chip->oob_poi;
3385 if (!chip->ecc.prepad && !chip->ecc.postpad) {
3391 ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0);
3404 ret = nand_write_data_op(chip, &fill,
3413 ret = nand_change_write_column_op(chip, pos,
3423 ret = nand_write_data_op(chip, bufpoi, len, false);
3431 ret = nand_write_data_op(chip, bufpoi, length, false);
3436 return nand_prog_page_end_op(chip);
3441 * @chip: NAND chip object
3447 static int nand_do_read_oob(struct nand_chip *chip, loff_t from,
3450 struct mtd_info *mtd = nand_to_mtd(chip);
3466 chipnr = (int)(from >> chip->chip_shift);
3467 nand_select_target(chip, chipnr);
3470 realpage = (int)(from >> chip->page_shift);
3471 page = realpage & chip->pagemask;
3475 ret = chip->ecc.read_oob_raw(chip, page);
3477 ret = chip->ecc.read_oob(chip, page);
3483 buf = nand_transfer_oob(chip, buf, ops, len);
3485 nand_wait_readrdy(chip);
3496 page = realpage & chip->pagemask;
3497 /* Check, if we cross a chip boundary */
3500 nand_deselect_target(chip);
3501 nand_select_target(chip, chipnr);
3504 nand_deselect_target(chip);
3528 struct nand_chip *chip = mtd_to_nand(mtd);
3538 nand_get_device(chip);
3541 ret = nand_do_read_oob(chip, from, ops);
3543 ret = nand_do_read_ops(chip, from, ops);
3545 nand_release_device(chip);
3551 * @chip: nand chip info structure
3553 * @oob_required: must write chip->oob_poi to OOB
3558 int nand_write_page_raw_notsupp(struct nand_chip *chip, const u8 *buf,
3566 * @chip: nand chip info structure
3568 * @oob_required: must write chip->oob_poi to OOB
3573 int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
3576 struct mtd_info *mtd = nand_to_mtd(chip);
3579 ret = nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize);
3584 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize,
3590 return nand_prog_page_end_op(chip);
3596 * @chip: NAND chip info structure
3598 * @oob_required: must write chip->oob_poi to OOB
3604 * into the NAND chip arrays in a single operation. This is an
3608 * synchronyze the NAND chip cache.
3610 int nand_monolithic_write_page_raw(struct nand_chip *chip, const u8 *buf,
3613 struct mtd_info *mtd = nand_to_mtd(chip);
3620 if (buf != chip->data_buf) {
3621 write_buf = nand_get_data_buf(chip);
3626 return nand_prog_page_op(chip, page, 0, write_buf, size);
3632 * @chip: nand chip info structure
3634 * @oob_required: must write chip->oob_poi to OOB
3639 static int nand_write_page_raw_syndrome(struct nand_chip *chip,
3643 struct mtd_info *mtd = nand_to_mtd(chip);
3644 int eccsize = chip->ecc.size;
3645 int eccbytes = chip->ecc.bytes;
3646 uint8_t *oob = chip->oob_poi;
3649 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3653 for (steps = chip->ecc.steps; steps > 0; steps--) {
3654 ret = nand_write_data_op(chip, buf, eccsize, false);
3660 if (chip->ecc.prepad) {
3661 ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
3666 oob += chip->ecc.prepad;
3669 ret = nand_write_data_op(chip, oob, eccbytes, false);
3675 if (chip->ecc.postpad) {
3676 ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
3681 oob += chip->ecc.postpad;
3685 size = mtd->oobsize - (oob - chip->oob_poi);
3687 ret = nand_write_data_op(chip, oob, size, false);
3692 return nand_prog_page_end_op(chip);
3696 * @chip: nand chip info structure
3698 * @oob_required: must write chip->oob_poi to OOB
3701 static int nand_write_page_swecc(struct nand_chip *chip, const uint8_t *buf,
3704 struct mtd_info *mtd = nand_to_mtd(chip);
3705 int i, eccsize = chip->ecc.size, ret;
3706 int eccbytes = chip->ecc.bytes;
3707 int eccsteps = chip->ecc.steps;
3708 uint8_t *ecc_calc = chip->ecc.calc_buf;
3713 chip->ecc.calculate(chip, p, &ecc_calc[i]);
3715 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0,
3716 chip->ecc.total);
3720 return chip->ecc.write_page_raw(chip, buf, 1, page);
3725 * @chip: nand chip info structure
3727 * @oob_required: must write chip->oob_poi to OOB
3730 static int nand_write_page_hwecc(struct nand_chip *chip, const uint8_t *buf,
3733 struct mtd_info *mtd = nand_to_mtd(chip);
3734 int i, eccsize = chip->ecc.size, ret;
3735 int eccbytes = chip->ecc.bytes;
3736 int eccsteps = chip->ecc.steps;
3737 uint8_t *ecc_calc = chip->ecc.calc_buf;
3740 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3745 chip->ecc.hwctl(chip, NAND_ECC_WRITE);
3747 ret = nand_write_data_op(chip, p, eccsize, false);
3751 chip->ecc.calculate(chip, p, &ecc_calc[i]);
3754 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0,
3755 chip->ecc.total);
3759 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
3763 return nand_prog_page_end_op(chip);
3769 * @chip: nand chip info structure
3773 * @oob_required: must write chip->oob_poi to OOB
3776 static int nand_write_subpage_hwecc(struct nand_chip *chip, uint32_t offset,
3780 struct mtd_info *mtd = nand_to_mtd(chip);
3781 uint8_t *oob_buf = chip->oob_poi;
3782 uint8_t *ecc_calc = chip->ecc.calc_buf;
3783 int ecc_size = chip->ecc.size;
3784 int ecc_bytes = chip->ecc.bytes;
3785 int ecc_steps = chip->ecc.steps;
3791 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3797 chip->ecc.hwctl(chip, NAND_ECC_WRITE);
3800 ret = nand_write_data_op(chip, buf, ecc_size, false);
3808 chip->ecc.calculate(chip, buf, ecc_calc);
3820 /* copy calculated ECC for whole page to chip->buffer->oob */
3822 ecc_calc = chip->ecc.calc_buf;
3823 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0,
3824 chip->ecc.total);
3829 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
3833 return nand_prog_page_end_op(chip);
3839 * @chip: nand chip info structure
3841 * @oob_required: must write chip->oob_poi to OOB
3847 static int nand_write_page_syndrome(struct nand_chip *chip, const uint8_t *buf,
3850 struct mtd_info *mtd = nand_to_mtd(chip);
3851 int i, eccsize = chip->ecc.size;
3852 int eccbytes = chip->ecc.bytes;
3853 int eccsteps = chip->ecc.steps;
3855 uint8_t *oob = chip->oob_poi;
3858 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3863 chip->ecc.hwctl(chip, NAND_ECC_WRITE);
3865 ret = nand_write_data_op(chip, p, eccsize, false);
3869 if (chip->ecc.prepad) {
3870 ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
3875 oob += chip->ecc.prepad;
3878 chip->ecc.calculate(chip, p, oob);
3880 ret = nand_write_data_op(chip, oob, eccbytes, false);
3886 if (chip->ecc.postpad) {
3887 ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
3892 oob += chip->ecc.postpad;
3897 i = mtd->oobsize - (oob - chip->oob_poi);
3899 ret = nand_write_data_op(chip, oob, i, false);
3904 return nand_prog_page_end_op(chip);
3909 * @chip: NAND chip descriptor
3913 * @oob_required: must write chip->oob_poi to OOB
3917 static int nand_write_page(struct nand_chip *chip, uint32_t offset,
3921 struct mtd_info *mtd = nand_to_mtd(chip);
3924 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3925 chip->ecc.write_subpage)
3931 status = chip->ecc.write_page_raw(chip, buf, oob_required,
3934 status = chip->ecc.write_subpage(chip, offset, data_len, buf,
3937 status = chip->ecc.write_page(chip, buf, oob_required, page);
3945 #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
3949 * @chip: NAND chip object
3955 static int nand_do_write_ops(struct nand_chip *chip, loff_t to,
3958 struct mtd_info *mtd = nand_to_mtd(chip);
3983 chipnr = (int)(to >> chip->chip_shift);
3984 nand_select_target(chip, chipnr);
3987 if (nand_check_wp(chip)) {
3992 realpage = (int)(to >> chip->page_shift);
3993 page = realpage & chip->pagemask;
3996 if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) &&
3997 ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len))
3998 chip->pagecache.page = -1;
4014 else if (chip->options & NAND_USES_DMA)
4017 chip->buf_align);
4030 wbuf = nand_get_data_buf(chip);
4037 oob = nand_fill_oob(chip, oob, len, ops);
4041 memset(chip->oob_poi, 0xff, mtd->oobsize);
4044 ret = nand_write_page(chip, column, bytes, wbuf,
4058 page = realpage & chip->pagemask;
4059 /* Check, if we cross a chip boundary */
4062 nand_deselect_target(chip);
4063 nand_select_target(chip, chipnr);
4072 nand_deselect_target(chip);
4090 struct nand_chip *chip = mtd_to_nand(mtd);
4091 int chipnr = (int)(to >> chip->chip_shift);
4095 nand_select_target(chip, chipnr);
4098 panic_nand_wait(chip, 400);
4105 ret = nand_do_write_ops(chip, to, &ops);
4120 struct nand_chip *chip = mtd_to_nand(mtd);
4125 nand_get_device(chip);
4138 ret = nand_do_write_oob(chip, to, ops);
4140 ret = nand_do_write_ops(chip, to, ops);
4143 nand_release_device(chip);
4161 * @chip: NAND chip object
4167 int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr,
4177 if (check_offs_len(chip, instr->addr, instr->len))
4181 nand_get_device(chip);
4184 page = (int)(instr->addr >> chip->page_shift);
4185 chipnr = (int)(instr->addr >> chip->chip_shift);
4188 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
4191 nand_select_target(chip, chipnr);
4194 if (nand_check_wp(chip)) {
4206 if (nand_block_checkbad(chip, ((loff_t) page) <<
4207 chip->page_shift, allowbbt)) {
4218 if (page <= chip->pagecache.page && chip->pagecache.page <
4220 chip->pagecache.page = -1;
4222 ret = nand_erase_op(chip, (page & chip->pagemask) >>
4223 (chip->phys_erase_shift - chip->page_shift));
4228 ((loff_t)page << chip->page_shift);
4233 len -= (1ULL << chip->phys_erase_shift);
4236 /* Check, if we cross a chip boundary */
4237 if (len && !(page & chip->pagemask)) {
4239 nand_deselect_target(chip);
4240 nand_select_target(chip, chipnr);
4248 nand_deselect_target(chip);
4249 nand_release_device(chip);
4259 * Sync is actually a wait for chip ready function.
4263 struct nand_chip *chip = mtd_to_nand(mtd);
4268 nand_get_device(chip);
4270 nand_release_device(chip);
4280 struct nand_chip *chip = mtd_to_nand(mtd);
4281 int chipnr = (int)(offs >> chip->chip_shift);
4285 nand_get_device(chip);
4287 nand_select_target(chip, chipnr);
4289 ret = nand_block_checkbad(chip, offs, 0);
4291 nand_deselect_target(chip);
4292 nand_release_device(chip);
4325 struct nand_chip *chip = mtd_to_nand(mtd);
4328 mutex_lock(&chip->lock);
4329 if (chip->ops.suspend)
4330 ret = chip->ops.suspend(chip);
4332 chip->suspended = 1;
4333 mutex_unlock(&chip->lock);
4344 struct nand_chip *chip = mtd_to_nand(mtd);
4346 mutex_lock(&chip->lock);
4347 if (chip->suspended) {
4348 if (chip->ops.resume)
4349 chip->ops.resume(chip);
4350 chip->suspended = 0;
4352 pr_err("%s called for a chip which is not in suspended state\n",
4355 mutex_unlock(&chip->lock);
4357 wake_up_all(&chip->resume_wq);
4378 struct nand_chip *chip = mtd_to_nand(mtd);
4380 if (!chip->ops.lock_area)
4383 return chip->ops.lock_area(chip, ofs, len);
4394 struct nand_chip *chip = mtd_to_nand(mtd);
4396 if (!chip->ops.unlock_area)
4399 return chip->ops.unlock_area(chip, ofs, len);
4403 static void nand_set_defaults(struct nand_chip *chip)
4406 if (!chip->controller) {
4407 chip->controller = &chip->legacy.dummy_controller;
4408 nand_controller_init(chip->controller);
4411 nand_legacy_set_defaults(chip);
4413 if (!chip->buf_align)
4414 chip->buf_align = 1;
4506 * chip. The rest of the parameters must be decoded according to generic or
4509 void nand_decode_ext_id(struct nand_chip *chip)
4512 struct mtd_info *mtd = nand_to_mtd(chip);
4514 u8 *id_data = chip->id.data;
4516 memorg = nanddev_get_memorg(&chip->base);
4538 chip->options |= NAND_BUSWIDTH_16;
4543 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
4545 * the chip.
4547 static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
4549 struct mtd_info *mtd = nand_to_mtd(chip);
4552 memorg = nanddev_get_memorg(&chip->base);
4570 static void nand_decode_bbm_options(struct nand_chip *chip)
4572 struct mtd_info *mtd = nand_to_mtd(chip);
4575 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
4576 chip->badblockpos = NAND_BBM_POS_LARGE;
4578 chip->badblockpos = NAND_BBM_POS_SMALL;
4586 static bool find_full_id_nand(struct nand_chip *chip,
4589 struct nand_device *base = &chip->base;
4591 struct mtd_info *mtd = nand_to_mtd(chip);
4593 u8 *id_data = chip->id.data;
4595 memorg = nanddev_get_memorg(&chip->base);
4611 chip->options |= type->options;
4616 chip->parameters.model = kstrdup(type->name, GFP_KERNEL);
4617 if (!chip->parameters.model)
4630 static void nand_manufacturer_detect(struct nand_chip *chip)
4636 if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&
4637 chip->manufacturer.desc->ops->detect) {
4640 memorg = nanddev_get_memorg(&chip->base);
4643 memorg->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
4644 chip->manufacturer.desc->ops->detect(chip);
4646 nand_decode_ext_id(chip);
4656 static int nand_manufacturer_init(struct nand_chip *chip)
4658 if (!chip->manufacturer.desc || !chip->manufacturer.desc->ops ||
4659 !chip->manufacturer.desc->ops->init)
4662 return chip->manufacturer.desc->ops->init(chip);
4671 static void nand_manufacturer_cleanup(struct nand_chip *chip)
4674 if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&
4675 chip->manufacturer.desc->ops->cleanup)
4676 chip->manufacturer.desc->ops->cleanup(chip);
4688 static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
4691 struct mtd_info *mtd = nand_to_mtd(chip);
4694 u8 *id_data = chip->id.data;
4702 memorg = nanddev_get_memorg(&chip->base);
4707 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
4710 ret = nand_reset(chip, 0);
4715 nand_select_target(chip, 0);
4718 ret = nand_readid_op(chip, 0, id_data, 2);
4734 ret = nand_readid_op(chip, 0, id_data, sizeof(chip->id.data));
4744 chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data));
4748 chip->manufacturer.desc = manufacturer_desc;
4760 busw = chip->options & NAND_BUSWIDTH_16;
4766 chip->options &= ~NAND_BUSWIDTH_16;
4770 if (find_full_id_nand(chip, type))
4778 /* Check if the chip is ONFI compliant */
4779 ret = nand_onfi_detect(chip);
4785 /* Check if the chip is JEDEC compliant */
4786 ret = nand_jedec_detect(chip);
4796 chip->parameters.model = kstrdup(type->name, GFP_KERNEL);
4797 if (!chip->parameters.model)
4801 nand_manufacturer_detect(chip);
4803 nand_decode_id(chip, type);
4805 /* Get chip options */
4806 chip->options |= type->options;
4815 mtd->name = chip->parameters.model;
4817 if (chip->options & NAND_BUSWIDTH_AUTO) {
4819 nand_set_defaults(chip);
4820 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
4823 * chip correct!
4830 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8);
4836 nand_decode_bbm_options(chip);
4839 chip->page_shift = ffs(mtd->writesize) - 1;
4840 /* Convert chipsize to number of pages per chip -1 */
4841 targetsize = nanddev_target_size(&chip->base);
4842 chip->pagemask = (targetsize >> chip->page_shift) - 1;
4844 chip->bbt_erase_shift = chip->phys_erase_shift =
4847 chip->chip_shift = ffs((unsigned)targetsize) - 1;
4849 chip->chip_shift = ffs((unsigned)(targetsize >> 32));
4850 chip->chip_shift += 32 - 1;
4853 if (chip->chip_shift - chip->page_shift > 16)
4854 chip->options |= NAND_ROW_ADDR_3;
4856 chip->badblockbits = 8;
4858 nand_legacy_adjust_cmdfunc(chip);
4863 chip->parameters.model);
4865 (int)(targetsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",
4870 kfree(chip->parameters.model);
4957 static void of_get_nand_ecc_legacy_user_config(struct nand_chip *chip)
4959 struct device_node *dn = nand_get_flash_node(chip);
4960 struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf;
4993 static int rawnand_dt_init(struct nand_chip *chip)
4995 struct nand_device *nand = mtd_to_nanddev(nand_to_mtd(chip));
4996 struct device_node *dn = nand_get_flash_node(chip);
5002 chip->options |= NAND_BUSWIDTH_16;
5005 chip->options |= NAND_IS_BOOT_MEDIUM;
5008 chip->bbt_options |= NAND_BBT_USE_FLASH;
5011 of_get_nand_ecc_legacy_user_config(chip);
5025 chip->ecc.engine_type = nand->ecc.user_conf.engine_type;
5026 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID)
5027 chip->ecc.engine_type = nand->ecc.defaults.engine_type;
5029 chip->ecc.placement = nand->ecc.user_conf.placement;
5030 chip->ecc.algo = nand->ecc.user_conf.algo;
5031 chip->ecc.strength = nand->ecc.user_conf.strength;
5032 chip->ecc.size = nand->ecc.user_conf.step_size;
5039 * @chip: NAND chip object
5051 static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips,
5054 struct mtd_info *mtd = nand_to_mtd(chip);
5060 memorg = nanddev_get_memorg(&chip->base);
5063 chip->cur_cs = -1;
5065 mutex_init(&chip->lock);
5066 init_waitqueue_head(&chip->resume_wq);
5069 chip->current_interface_config = nand_get_reset_interface_config();
5071 ret = rawnand_dt_init(chip);
5079 nand_set_defaults(chip);
5081 ret = nand_legacy_check_hooks(chip);
5088 ret = nand_detect(chip, table);
5090 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
5092 nand_deselect_target(chip);
5096 nand_maf_id = chip->id.data[0];
5097 nand_dev_id = chip->id.data[1];
5099 nand_deselect_target(chip);
5101 /* Check for a chip array */
5106 ret = nand_reset(chip, i);
5110 nand_select_target(chip, i);
5112 ret = nand_readid_op(chip, 0, id, sizeof(id));
5117 nand_deselect_target(chip);
5120 nand_deselect_target(chip);
5127 mtd->size = i * nanddev_target_size(&chip->base);
5132 static void nand_scan_ident_cleanup(struct nand_chip *chip)
5134 kfree(chip->parameters.model);
5135 kfree(chip->parameters.onfi);
5138 static int nand_set_ecc_on_host_ops(struct nand_chip *chip)
5140 struct nand_ecc_ctrl *ecc = &chip->ecc;
5197 static int nand_set_ecc_soft_ops(struct nand_chip *chip)
5199 struct mtd_info *mtd = nand_to_mtd(chip);
5201 struct nand_ecc_ctrl *ecc = &chip->ecc;
5304 * @chip: nand chip info structure
5309 * by the controller and the calculated ECC bytes fit within the chip's OOB.
5313 nand_check_ecc_caps(struct nand_chip *chip,
5316 struct mtd_info *mtd = nand_to_mtd(chip);
5318 int preset_step = chip->ecc.size;
5319 int preset_strength = chip->ecc.strength;
5344 chip->ecc.bytes = ecc_bytes;
5357 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
5358 * @chip: nand chip info structure
5362 * If a chip's ECC requirement is provided, try to meet it with the least
5367 nand_match_ecc_req(struct nand_chip *chip,
5371 nanddev_get_ecc_requirements(&chip->base);
5372 struct mtd_info *mtd = nand_to_mtd(chip);
5381 /* No information provided by the NAND chip */
5385 /* number of correctable bits the chip requires in a page */
5397 * chip's requirement, it is not easy to compare the
5418 * We assume the best is to meet the chip's requrement
5433 chip->ecc.size = best_step;
5434 chip->ecc.strength = best_strength;
5435 chip->ecc.bytes = best_ecc_bytes;
5442 * @chip: nand chip info structure
5447 * within the chip's OOB. On success, the chosen ECC settings are set.
5450 nand_maximize_ecc(struct nand_chip *chip,
5453 struct mtd_info *mtd = nand_to_mtd(chip);
5465 /* If chip->ecc.size is already set, respect it */
5466 if (chip->ecc.size && step_size != chip->ecc.size)
5503 chip->ecc.size = best_step;
5504 chip->ecc.strength = best_strength;
5505 chip->ecc.bytes = best_ecc_bytes;
5512 * @chip: nand chip info structure
5523 * to the chip's requirement. If available OOB size can't fit the chip
5528 int nand_ecc_choose_conf(struct nand_chip *chip,
5531 struct mtd_info *mtd = nand_to_mtd(chip);
5537 if (chip->ecc.size && chip->ecc.strength)
5538 return nand_check_ecc_caps(chip, caps, oobavail);
5541 return nand_maximize_ecc(chip, caps, oobavail);
5543 if (!nand_match_ecc_req(chip, caps, oobavail))
5546 return nand_maximize_ecc(chip, caps, oobavail);
5552 struct nand_chip *chip = container_of(nand, struct nand_chip,
5559 nand_select_target(chip, pos->target);
5560 ret = nand_erase_op(chip, eb);
5561 nand_deselect_target(chip);
5569 struct nand_chip *chip = container_of(nand, struct nand_chip,
5572 return nand_markbad_bbm(chip, nanddev_pos_to_offs(nand, pos));
5577 struct nand_chip *chip = container_of(nand, struct nand_chip,
5581 nand_select_target(chip, pos->target);
5582 ret = nand_isbad_bbm(chip, nanddev_pos_to_offs(nand, pos));
5583 nand_deselect_target(chip);
5596 * @chip: NAND chip object
5602 static int nand_scan_tail(struct nand_chip *chip)
5604 struct mtd_info *mtd = nand_to_mtd(chip);
5605 struct nand_ecc_ctrl *ecc = &chip->ecc;
5609 if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
5610 !(chip->bbt_options & NAND_BBT_USE_FLASH))) {
5614 chip->data_buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
5615 if (!chip->data_buf)
5622 * chip.
5624 nand_select_target(chip, 0);
5625 ret = nand_manufacturer_init(chip);
5626 nand_deselect_target(chip);
5631 chip->oob_poi = chip->data_buf + mtd->writesize;
5677 ret = nand_set_ecc_on_host_ops(chip);
5696 ret = nand_set_ecc_soft_ops(chip);
5763 chip->base.ecc.ctx.total = ecc->total;
5782 if (!nand_ecc_is_strong_enough(&chip->base))
5783 pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n",
5784 mtd->name, chip->ecc.strength, chip->ecc.size,
5785 nanddev_get_ecc_requirements(&chip->base)->strength,
5786 nanddev_get_ecc_requirements(&chip->base)->step_size);
5789 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
5801 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
5804 chip->pagecache.page = -1;
5809 if (chip->page_shift > 9)
5810 chip->options |= NAND_SUBPAGE_READ;
5817 ret = nanddev_init(&chip->base, &rawnand_ops, mtd->owner);
5822 if (chip->options & NAND_ROM)
5851 /* Find the fastest data interface for this chip */
5852 ret = nand_choose_interface_config(chip);
5857 for (i = 0; i < nanddev_ntargets(&chip->base); i++) {
5858 ret = nand_setup_interface(chip, i);
5864 if (chip->options & NAND_SKIP_BBTSCAN)
5868 ret = nand_create_bbt(chip);
5875 kfree(chip->best_interface_config);
5878 nanddev_cleanup(&chip->base);
5881 nand_manufacturer_cleanup(chip);
5884 kfree(chip->data_buf);
5891 static int nand_attach(struct nand_chip *chip)
5893 if (chip->controller->ops && chip->controller->ops->attach_chip)
5894 return chip->controller->ops->attach_chip(chip);
5899 static void nand_detach(struct nand_chip *chip)
5901 if (chip->controller->ops && chip->controller->ops->detach_chip)
5902 chip->controller->ops->detach_chip(chip);
5907 * @chip: NAND chip object
5912 * The flash ID is read and the mtd/chip structures are filled with the
5915 int nand_scan_with_ids(struct nand_chip *chip, unsigned int maxchips,
5923 ret = nand_scan_ident(chip, maxchips, ids);
5927 ret = nand_attach(chip);
5931 ret = nand_scan_tail(chip);
5938 nand_detach(chip);
5940 nand_scan_ident_cleanup(chip);
5948 * @chip: NAND chip object
5950 void nand_cleanup(struct nand_chip *chip)
5952 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
5953 chip->ecc.algo == NAND_ECC_ALGO_BCH)
5954 nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
5956 nanddev_cleanup(&chip->base);
5959 kfree(chip->bbt);
5960 kfree(chip->data_buf);
5961 kfree(chip->ecc.code_buf);
5962 kfree(chip->ecc.calc_buf);
5965 if (chip->badblock_pattern && chip->badblock_pattern->options
5967 kfree(chip->badblock_pattern);
5970 kfree(chip->best_interface_config);
5973 nand_manufacturer_cleanup(chip);
5975 /* Free controller specific allocations after chip identification */
5976 nand_detach(chip);
5979 nand_scan_ident_cleanup(chip);