Lines Matching defs:timings
610 const struct nand_sdr_timings *timings;
618 timings = nand_get_sdr_timings(nand_get_interface_config(chip));
619 ndelay(PSEC_TO_NSEC(timings->tWB_max));
743 * nand_reset_interface - Reset data interface and timings
747 * Reset the Data interface and timings to ONFI mode 0.
770 * timings to timing mode 0.
783 * nand_setup_interface - Setup the best data interface and timings
788 * timings supported by the chip and the driver.
803 * controller in timings mode 0. If the default mode for this chip is
811 tmode_param[0] = chip->best_interface_config->timings.mode;
840 if (tmode_param[0] != chip->best_interface_config->timings.mode) {
842 chip->best_interface_config->timings.mode);
865 * nand_choose_best_sdr_timings - Pick up the best SDR timings that both the
869 * @spec_timings: specific timings, when not fitting the ONFI specification
871 * If specific timings are provided, use them. Otherwise, retrieve supported
884 iface->timings.sdr = *spec_timings;
885 iface->timings.mode = onfi_find_closest_sdr_mode(spec_timings);
896 best_mode = iface->timings.mode;
916 * nand_choose_interface_config - find the best data interface and timings
919 * Find the best data interface and NAND timings supported by the chip
921 * set of timings.
2366 * Save the timings data structure, then apply SDR timings mode 0 (see
2368 * back the previous timings.
5068 /* Enforce the right timings for reset/detection */