Lines Matching defs:page
17 * rework for 2K page size chips
20 * Enable cached programming for 2k page size chips
49 static int nand_pairing_dist3_get_info(struct mtd_info *mtd, int page,
55 if (page == lastpage)
58 if (!page || (page & 1)) {
60 info->pair = (page + 1) / 2;
63 info->pair = (page + 1 - dist) / 2;
73 int page = info->pair * 2;
83 page--;
85 page += dist - 1;
87 if (page >= mtd->erasesize / mtd->writesize)
90 return page;
217 * nand_bbm_get_next_page - Get the next page for bad block markers
219 * @page: First page to start checking for bad block marker usage
221 * Returns an integer that corresponds to the page offset within a block, for
222 * a page that is used to store bad block markers. If no more pages are
225 int nand_bbm_get_next_page(struct nand_chip *chip, int page)
233 if (page == 0 && !(chip->options & bbm_flags))
235 if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE)
237 if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE)
239 if (page <= last_page && chip->options & NAND_BBM_LASTPAGE)
389 int chipnr, page, status, len, ret;
396 /* Do not allow write past end of page */
398 pr_debug("%s: attempt to write past end of page\n",
407 * of my DiskOnChip 2000 test units) will clear the whole data page too
417 /* Shift to get page */
418 page = (int)(to >> chip->page_shift);
426 /* Invalidate the page cache, if we write to the cached page */
427 if (page == chip->pagecache.page)
428 chip->pagecache.page = -1;
433 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask);
435 status = chip->ecc.write_oob(chip, page & chip->pagemask);
806 * fail anyway as the parameter page is not available yet.
955 * @offset_in_page: The offset in the page
958 * on the NAND bus width and the page size.
968 /* Make sure the offset is less than the actual page size. */
973 * On small page NANDs, there's a dedicated command to access the OOB
975 * area, not the start of the page. Asjust the address accordingly.
981 * The offset in page is expressed in bytes, if the NAND bus is 16-bit
994 * Small page NANDs use 1 cycle for the columns, while large page NANDs
1005 static int nand_sp_exec_read_page_op(struct nand_chip *chip, unsigned int page,
1037 addrs[1] = page;
1038 addrs[2] = page >> 8;
1041 addrs[3] = page >> 16;
1048 static int nand_lp_exec_read_page_op(struct nand_chip *chip, unsigned int page,
1074 addrs[2] = page;
1075 addrs[3] = page >> 8;
1078 addrs[4] = page >> 16;
1088 * @page: page to read
1089 * @offset_in_page: offset within the page
1098 int nand_read_page_op(struct nand_chip *chip, unsigned int page,
1111 return nand_lp_exec_read_page_op(chip, page,
1115 return nand_sp_exec_read_page_op(chip, page, offset_in_page,
1119 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, offset_in_page, page);
1130 * @page: parameter page to read
1139 int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
1153 NAND_OP_ADDR(1, &page, PSEC_TO_NSEC(sdr->tWB_max)),
1167 chip->legacy.cmdfunc(chip, NAND_CMD_PARAM, page, -1);
1177 * @offset_in_page: offset within the page
1199 /* Small page NANDs do not support column change. */
1241 * @page: page to read
1251 int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
1263 return nand_read_page_op(chip, page,
1267 chip->legacy.cmdfunc(chip, NAND_CMD_READOOB, offset_in_oob, page);
1275 static int nand_exec_prog_page_op(struct nand_chip *chip, unsigned int page,
1286 * with a large page NAND and adjusted if we're dealing
1287 * with a small page NAND and the page offset is > 255.
1304 addrs[naddrs++] = page;
1305 addrs[naddrs++] = page >> 8;
1307 addrs[naddrs++] = page >> 16;
1311 /* Drop the last two instructions if we're not programming the page. */
1322 * first instruction depending on the page offset we're trying
1332 * Drop the first command if we're dealing with a large page
1353 * @page: page to write
1354 * @offset_in_page: offset within the page
1355 * @buf: buffer containing the data to write to the page
1363 int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
1376 return nand_exec_prog_page_op(chip, page, offset_in_page, buf,
1379 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, page);
1438 * @page: page to write
1439 * @offset_in_page: offset within the page
1440 * @buf: buffer containing the data to write to the page
1448 int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
1462 status = nand_exec_prog_page_op(chip, page, offset_in_page, buf,
1466 page);
1482 * @offset_in_page: offset within the page
1505 /* Small page NANDs do not support column change. */
1667 unsigned int page = eraseblock <<
1675 u8 addrs[3] = { page, page >> 8, page >> 16 };
1696 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE1, -1, page);
2514 * different from the NAND page size. When fixing bitflips, ECC engines will
2516 * expect you to return the maximum number of bitflips for the whole page.
2518 * not on the whole page. After checking each chunk you should update your
2573 * nand_read_page_raw_notsupp - dummy read raw page function
2577 * @page: page number to read
2582 int oob_required, int page)
2588 * nand_read_page_raw - [INTERN] read raw page data without ecc
2592 * @page: page number to read
2597 int page)
2602 ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize);
2618 * nand_monolithic_read_page_raw - Monolithic page read in raw mode
2622 * @page: page number to read
2624 * This is a raw page read, ie. without any error detection/correction.
2633 int oob_required, int page)
2647 ret = nand_read_page_op(chip, page, 0, read_buf, size);
2659 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
2663 * @page: page number to read
2668 int oob_required, int page)
2676 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2723 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
2727 * @page: page number to read
2730 int oob_required, int page)
2741 chip->ecc.read_page_raw(chip, buf, 1, page);
2769 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
2771 * @data_offs: offset of requested data within the page
2774 * @page: page number to read
2777 uint32_t readlen, uint8_t *bufpoi, int page)
2789 /* Column address within the page aligned to ECC size (256bytes) */
2800 /* If we read not a page aligned data */
2802 ret = nand_read_page_op(chip, page, data_col_addr, p, datafrag_len);
2880 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
2884 * @page: page number to read
2889 int oob_required, int page)
2900 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2951 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
2955 * @page: page number to read
2961 int oob_required, int page)
2972 ret = nand_read_page_op(chip, page, 0, NULL, 0);
3080 * when there are too many bitflips in a page (i.e., ECC error). After setting
3081 * a new threshold, the host should retry reading the page.
3118 int chipnr, page, realpage, col, bytes, aligned, oob_required;
3135 page = realpage & chip->pagemask;
3158 /* Is the current page in the buffer? */
3159 if (realpage != chip->pagecache.page || oob) {
3168 * Now read the page into the buffer. Absent an error,
3174 page);
3178 bufpoi, page);
3181 oob_required, page);
3184 /* Invalidate page cache */
3185 chip->pagecache.page = -1;
3197 chip->pagecache.page = realpage;
3200 /* Invalidate page cache */
3201 chip->pagecache.page = -1;
3257 /* For subsequent reads align to page boundary */
3259 /* Increment page address */
3262 page = realpage & chip->pagemask;
3264 if (!page) {
3288 * @page: page number to read
3290 int nand_read_oob_std(struct nand_chip *chip, int page)
3294 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
3302 * @page: page number to read
3304 static int nand_read_oob_syndrome(struct nand_chip *chip, int page)
3313 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);
3327 ret = nand_read_page_op(chip, page, pos, NULL,
3355 * @page: page number to write
3357 int nand_write_oob_std(struct nand_chip *chip, int page)
3361 return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
3368 * with syndrome - only for large page flash
3370 * @page: page number to write
3372 static int nand_write_oob_syndrome(struct nand_chip *chip, int page)
3391 ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0);
3452 int page, realpage, chipnr;
3469 /* Shift to get page */
3471 page = realpage & chip->pagemask;
3475 ret = chip->ecc.read_oob_raw(chip, page);
3477 ret = chip->ecc.read_oob(chip, page);
3493 /* Increment page address */
3496 page = realpage & chip->pagemask;
3498 if (!page) {
3550 * nand_write_page_raw_notsupp - dummy raw page write function
3554 * @page: page number to write
3559 int oob_required, int page)
3565 * nand_write_page_raw - [INTERN] raw page write function
3569 * @page: page number to write
3574 int oob_required, int page)
3579 ret = nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize);
3595 * nand_monolithic_write_page_raw - Monolithic page write in raw mode
3599 * @page: page number to write
3601 * This is a raw page write, ie. without any error detection/correction.
3611 int oob_required, int page)
3626 return nand_prog_page_op(chip, page, 0, write_buf, size);
3631 * nand_write_page_raw_syndrome - [INTERN] raw page write function
3635 * @page: page number to write
3641 int page)
3649 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3695 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
3699 * @page: page number to write
3702 int oob_required, int page)
3720 return chip->ecc.write_page_raw(chip, buf, 1, page);
3724 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
3728 * @page: page number to write
3731 int oob_required, int page)
3740 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3770 * @offset: column address of subpage within the page
3774 * @page: page number to write
3778 int oob_required, int page)
3791 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3820 /* copy calculated ECC for whole page to chip->buffer->oob */
3838 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
3842 * @page: page number to write
3848 int oob_required, int page)
3858 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3908 * nand_write_page - write one page
3910 * @offset: address offset within the page
3914 * @page: page number to write
3919 int page, int raw)
3932 page);
3935 oob_required, page);
3937 status = chip->ecc.write_page(chip, buf, oob_required, page);
3959 int chipnr, realpage, page, column;
3974 /* Reject writes, which are not page aligned */
3976 pr_notice("%s: attempt to write non page aligned data\n",
3993 page = realpage & chip->pagemask;
3995 /* Invalidate the page cache, when we write to the cached page */
3996 if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) &&
3997 ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len))
3998 chip->pagecache.page = -1;
4022 * Copy the data from the initial buffer when doing partial page
4045 oob_required, page,
4058 page = realpage & chip->pagemask;
4060 if (!page) {
4170 int page, pages_per_block, ret, chipnr;
4183 /* Shift to get first page */
4184 page = (int)(instr->addr >> chip->page_shift);
4206 if (nand_block_checkbad(chip, ((loff_t) page) <<
4208 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
4209 __func__, page);
4215 * Invalidate the page cache, if we erase the block which
4216 * contains the current cached page.
4218 if (page <= chip->pagecache.page && chip->pagecache.page <
4219 (page + pages_per_block))
4220 chip->pagecache.page = -1;
4222 ret = nand_erase_op(chip, (page & chip->pagemask) >>
4225 pr_debug("%s: failed erase, page 0x%08x\n",
4226 __func__, page);
4228 ((loff_t)page << chip->page_shift);
4232 /* Increment page address and decrement length */
4234 page += pages_per_block;
4237 if (len && !(page & chip->pagemask)) {
4374 * @len: number of bytes to lock (must be a multiple of block/page size)
4390 * @len: number of bytes to unlock (must be a multiple of block/page size)
4561 /* All legacy ID NAND are small-page, SLC */
4568 * page size, cell-type information).
4838 /* Calculate the address shift from the page size */
4864 pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
5145 /* Use standard hwecc read page function? */
5173 /* Use standard syndrome read/write page function? */
5248 * Otherwise, default to 4 bits for large page devices.
5257 * large page one.
5260 /* handle large page devices only */
5385 /* number of correctable bits the chip requires in a page */
5630 /* Set the internal oob buffer location, just after the page data */
5654 * page with ECC layout when ->oobsize <= 128 for
5689 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
5752 * Set the number of read / write steps for one page depending on ECC
5804 chip->pagecache.page = -1;
5806 /* Large page NAND with SOFT_ECC should support subpage reads */