Lines Matching refs:ncfg
183 struct lpc32xx_nand_cfg_mlc *ncfg;
259 tmp |= MLCTIMEREG_TCEA_DELAY(clkrate / host->ncfg->tcea_delay + 1);
260 tmp |= MLCTIMEREG_BUSY_DELAY(clkrate / host->ncfg->busy_delay + 1);
261 tmp |= MLCTIMEREG_NAND_TA(clkrate / host->ncfg->nand_ta + 1);
262 tmp |= MLCTIMEREG_RD_HIGH(clkrate / host->ncfg->rd_high + 1);
263 tmp |= MLCTIMEREG_RD_LOW(clkrate / host->ncfg->rd_low);
264 tmp |= MLCTIMEREG_WR_HIGH(clkrate / host->ncfg->wr_high + 1);
265 tmp |= MLCTIMEREG_WR_LOW(clkrate / host->ncfg->wr_low);
374 if (gpio_is_valid(host->ncfg->wp_gpio))
375 gpio_set_value(host->ncfg->wp_gpio, 0);
383 if (gpio_is_valid(host->ncfg->wp_gpio))
384 gpio_set_value(host->ncfg->wp_gpio, 1);
618 struct lpc32xx_nand_cfg_mlc *ncfg;
621 ncfg = devm_kzalloc(dev, sizeof(*ncfg), GFP_KERNEL);
622 if (!ncfg)
625 of_property_read_u32(np, "nxp,tcea-delay", &ncfg->tcea_delay);
626 of_property_read_u32(np, "nxp,busy-delay", &ncfg->busy_delay);
627 of_property_read_u32(np, "nxp,nand-ta", &ncfg->nand_ta);
628 of_property_read_u32(np, "nxp,rd-high", &ncfg->rd_high);
629 of_property_read_u32(np, "nxp,rd-low", &ncfg->rd_low);
630 of_property_read_u32(np, "nxp,wr-high", &ncfg->wr_high);
631 of_property_read_u32(np, "nxp,wr-low", &ncfg->wr_low);
633 if (!ncfg->tcea_delay || !ncfg->busy_delay || !ncfg->nand_ta ||
634 !ncfg->rd_high || !ncfg->rd_low || !ncfg->wr_high ||
635 !ncfg->wr_low) {
640 ncfg->wp_gpio = of_get_named_gpio(np, "gpios", 0);
642 return ncfg;
711 host->ncfg = lpc32xx_parse_dt(&pdev->dev);
712 if (!host->ncfg) {
717 if (host->ncfg->wp_gpio == -EPROBE_DEFER)
719 if (gpio_is_valid(host->ncfg->wp_gpio) &&
720 gpio_request(host->ncfg->wp_gpio, "NAND WP")) {
801 res = mtd_device_register(mtd, host->ncfg->parts,
802 host->ncfg->num_parts);
821 gpio_free(host->ncfg->wp_gpio);
847 gpio_free(host->ncfg->wp_gpio);