Lines Matching refs:gpiomtd
30 struct gpiomtd {
43 static inline struct gpiomtd *gpio_nand_getpriv(struct mtd_info *mtd)
45 return container_of(mtd_to_nand(mtd), struct gpiomtd, nand_chip);
57 static void gpio_nand_dosync(struct gpiomtd *gpiomtd)
61 if (gpiomtd->io_sync) {
67 tmp = readl(gpiomtd->io_sync);
72 static inline void gpio_nand_dosync(struct gpiomtd *gpiomtd) {}
78 struct gpiomtd *gpiomtd = gpio_nand_getpriv(nand_to_mtd(chip));
83 gpio_nand_dosync(gpiomtd);
84 gpiod_set_value(gpiomtd->cle, 1);
85 gpio_nand_dosync(gpiomtd);
86 writeb(instr->ctx.cmd.opcode, gpiomtd->io);
87 gpio_nand_dosync(gpiomtd);
88 gpiod_set_value(gpiomtd->cle, 0);
92 gpio_nand_dosync(gpiomtd);
93 gpiod_set_value(gpiomtd->ale, 1);
94 gpio_nand_dosync(gpiomtd);
96 writeb(instr->ctx.addr.addrs[i], gpiomtd->io);
97 gpio_nand_dosync(gpiomtd);
98 gpiod_set_value(gpiomtd->ale, 0);
102 gpio_nand_dosync(gpiomtd);
105 ioread16_rep(gpiomtd->io, instr->ctx.data.buf.in,
108 ioread8_rep(gpiomtd->io, instr->ctx.data.buf.in,
113 gpio_nand_dosync(gpiomtd);
116 iowrite16_rep(gpiomtd->io, instr->ctx.data.buf.out,
119 iowrite8_rep(gpiomtd->io, instr->ctx.data.buf.out,
124 if (!gpiomtd->rdy)
127 return nand_gpio_waitrdy(chip, gpiomtd->rdy,
141 struct gpiomtd *gpiomtd = gpio_nand_getpriv(nand_to_mtd(chip));
148 gpio_nand_dosync(gpiomtd);
149 gpiod_set_value(gpiomtd->nce, 0);
158 gpio_nand_dosync(gpiomtd);
159 gpiod_set_value(gpiomtd->nce, 1);
270 struct gpiomtd *gpiomtd = platform_get_drvdata(pdev);
271 struct nand_chip *chip = &gpiomtd->nand_chip;
279 if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
280 gpiod_set_value(gpiomtd->nwp, 0);
281 if (gpiomtd->nce && !IS_ERR(gpiomtd->nce))
282 gpiod_set_value(gpiomtd->nce, 0);
289 struct gpiomtd *gpiomtd;
299 gpiomtd = devm_kzalloc(dev, sizeof(*gpiomtd), GFP_KERNEL);
300 if (!gpiomtd)
303 chip = &gpiomtd->nand_chip;
306 gpiomtd->io = devm_ioremap_resource(dev, res);
307 if (IS_ERR(gpiomtd->io))
308 return PTR_ERR(gpiomtd->io);
312 gpiomtd->io_sync = devm_ioremap_resource(dev, res);
313 if (IS_ERR(gpiomtd->io_sync))
314 return PTR_ERR(gpiomtd->io_sync);
317 ret = gpio_nand_get_config(dev, &gpiomtd->plat);
322 gpiomtd->nce = devm_gpiod_get_optional(dev, "nce", GPIOD_OUT_HIGH);
323 if (IS_ERR(gpiomtd->nce))
324 return PTR_ERR(gpiomtd->nce);
327 gpiomtd->nwp = devm_gpiod_get_optional(dev, "nwp", GPIOD_OUT_LOW);
328 if (IS_ERR(gpiomtd->nwp)) {
329 ret = PTR_ERR(gpiomtd->nwp);
333 gpiomtd->ale = devm_gpiod_get(dev, "ale", GPIOD_OUT_LOW);
334 if (IS_ERR(gpiomtd->ale)) {
335 ret = PTR_ERR(gpiomtd->ale);
339 gpiomtd->cle = devm_gpiod_get(dev, "cle", GPIOD_OUT_LOW);
340 if (IS_ERR(gpiomtd->cle)) {
341 ret = PTR_ERR(gpiomtd->cle);
345 gpiomtd->rdy = devm_gpiod_get_optional(dev, "rdy", GPIOD_IN);
346 if (IS_ERR(gpiomtd->rdy)) {
347 ret = PTR_ERR(gpiomtd->rdy);
351 nand_controller_init(&gpiomtd->base);
352 gpiomtd->base.ops = &gpio_nand_ops;
355 chip->options = gpiomtd->plat.options;
356 chip->controller = &gpiomtd->base;
361 platform_set_drvdata(pdev, gpiomtd);
364 if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
365 gpiod_direction_output(gpiomtd->nwp, 1);
378 if (gpiomtd->plat.adjust_parts)
379 gpiomtd->plat.adjust_parts(&gpiomtd->plat, mtd->size);
381 ret = mtd_device_register(mtd, gpiomtd->plat.parts,
382 gpiomtd->plat.num_parts);
387 if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
388 gpiod_set_value(gpiomtd->nwp, 0);
390 if (gpiomtd->nce && !IS_ERR(gpiomtd->nce))
391 gpiod_set_value(gpiomtd->nce, 0);