Lines Matching refs:fsm
311 static int stfsm_n25q_config(struct stfsm *fsm);
312 static int stfsm_mx25_config(struct stfsm *fsm);
313 static int stfsm_s25fl_config(struct stfsm *fsm);
314 static int stfsm_w25q_config(struct stfsm *fsm);
702 static inline int stfsm_is_idle(struct stfsm *fsm)
704 return readl(fsm->base + SPI_FAST_SEQ_STA) & 0x10;
707 static inline uint32_t stfsm_fifo_available(struct stfsm *fsm)
709 return (readl(fsm->base + SPI_FAST_SEQ_STA) >> 5) & 0x7f;
712 static inline void stfsm_load_seq(struct stfsm *fsm,
715 void __iomem *dst = fsm->base + SPI_FAST_SEQ_TRANSFER_SIZE;
719 BUG_ON(!stfsm_is_idle(fsm));
728 static void stfsm_wait_seq(struct stfsm *fsm)
739 if (stfsm_is_idle(fsm))
745 dev_err(fsm->dev, "timeout on sequence completion\n");
748 static void stfsm_read_fifo(struct stfsm *fsm, uint32_t *buf, uint32_t size)
754 dev_dbg(fsm->dev, "Reading %d bytes from FIFO\n", size);
760 avail = stfsm_fifo_available(fsm);
768 readsl(fsm->base + SPI_FAST_SEQ_DATA_REG, buf, words);
799 static void stfsm_clear_fifo(struct stfsm *fsm)
805 words = stfsm_fifo_available(fsm);
808 readl(fsm->base + SPI_FAST_SEQ_DATA_REG);
809 dev_dbg(fsm->dev, "cleared %d words from FIFO\n", words);
818 stfsm_load_seq(fsm, seq);
819 stfsm_wait_seq(fsm);
820 words = stfsm_fifo_available(fsm);
825 dev_err(fsm->dev, "failed to clear bytes from the data FIFO\n");
830 readl(fsm->base + SPI_FAST_SEQ_DATA_REG);
832 dev_dbg(fsm->dev, "cleared %d byte(s) from the data FIFO\n", 4 - i);
835 static int stfsm_write_fifo(struct stfsm *fsm, const uint32_t *buf,
840 dev_dbg(fsm->dev, "writing %d bytes to FIFO\n", size);
844 writesl(fsm->base + SPI_FAST_SEQ_DATA_REG, buf, words);
849 static int stfsm_enter_32bit_addr(struct stfsm *fsm, int enter)
851 struct stfsm_seq *seq = &fsm->stfsm_seq_en_32bit_addr;
859 stfsm_load_seq(fsm, seq);
861 stfsm_wait_seq(fsm);
866 static uint8_t stfsm_wait_busy(struct stfsm *fsm)
879 stfsm_load_seq(fsm, seq);
889 stfsm_wait_seq(fsm);
891 stfsm_read_fifo(fsm, &status, 4);
896 if ((fsm->configuration & CFG_S25FL_CHECK_ERROR_FLAGS) &&
903 writel(seq->seq_cfg, fsm->base + SPI_FAST_SEQ_CFG);
908 dev_err(fsm->dev, "timeout on wait_busy\n");
913 static int stfsm_read_status(struct stfsm *fsm, uint8_t cmd,
921 dev_dbg(fsm->dev, "read 'status' register [0x%02x], %d byte(s)\n",
929 stfsm_load_seq(fsm, seq);
931 stfsm_read_fifo(fsm, &tmp, 4);
936 stfsm_wait_seq(fsm);
941 static int stfsm_write_status(struct stfsm *fsm, uint8_t cmd,
946 dev_dbg(fsm->dev,
958 stfsm_load_seq(fsm, seq);
960 stfsm_wait_seq(fsm);
963 stfsm_wait_busy(fsm);
988 static bool stfsm_can_handle_soc_reset(struct stfsm *fsm)
991 if (fsm->reset_signal && fsm->info->flags & FLASH_FLAG_RESET)
995 if (fsm->reset_por)
1003 static void stfsm_prepare_erasesec_seq(struct stfsm *fsm,
1006 int addr1_cycles = fsm->info->flags & FLASH_FLAG_32BIT_ADDR ? 16 : 8;
1017 stfsm_search_seq_rw_configs(struct stfsm *fsm,
1021 int flags = fsm->info->flags;
1031 static void stfsm_prepare_rw_seq(struct stfsm *fsm,
1053 addr1_cycles = (fsm->info->flags & FLASH_FLAG_32BIT_ADDR) ? 16 : 8;
1099 static int stfsm_search_prepare_rw_seq(struct stfsm *fsm,
1105 config = stfsm_search_seq_rw_configs(fsm, cfgs);
1107 dev_err(fsm->dev, "failed to find suitable config\n");
1111 stfsm_prepare_rw_seq(fsm, seq, config);
1117 static int stfsm_prepare_rwe_seqs_default(struct stfsm *fsm)
1119 uint32_t flags = fsm->info->flags;
1123 ret = stfsm_search_prepare_rw_seq(fsm, &fsm->stfsm_seq_read,
1126 dev_err(fsm->dev,
1133 ret = stfsm_search_prepare_rw_seq(fsm, &fsm->stfsm_seq_write,
1136 dev_err(fsm->dev,
1143 stfsm_prepare_erasesec_seq(fsm, &stfsm_seq_erase_sector);
1148 static int stfsm_mx25_config(struct stfsm *fsm)
1150 uint32_t flags = fsm->info->flags;
1159 ret = stfsm_prepare_rwe_seqs_default(fsm);
1168 stfsm_mx25_en_32bit_addr_seq(&fsm->stfsm_seq_en_32bit_addr);
1170 soc_reset = stfsm_can_handle_soc_reset(fsm);
1171 if (soc_reset || !fsm->booted_from_spi)
1174 stfsm_enter_32bit_addr(fsm, 1);
1179 fsm->configuration = (CFG_READ_TOGGLE_32BIT_ADDR |
1185 stfsm_read_status(fsm, SPINOR_OP_RDSR, &sta, 1);
1186 data_pads = ((fsm->stfsm_seq_read.seq_cfg >> 16) & 0x3) + 1;
1192 stfsm_write_status(fsm, SPINOR_OP_WRSR, sta, 1, 1);
1199 stfsm_write_status(fsm, SPINOR_OP_WRSR, sta, 1, 1);
1206 static int stfsm_n25q_config(struct stfsm *fsm)
1208 uint32_t flags = fsm->info->flags;
1215 ret = stfsm_search_prepare_rw_seq(fsm, &fsm->stfsm_seq_read,
1218 ret = stfsm_search_prepare_rw_seq(fsm, &fsm->stfsm_seq_read,
1221 dev_err(fsm->dev,
1228 ret = stfsm_search_prepare_rw_seq(fsm, &fsm->stfsm_seq_write,
1231 dev_err(fsm->dev,
1238 stfsm_prepare_erasesec_seq(fsm, &stfsm_seq_erase_sector);
1242 stfsm_n25q_en_32bit_addr_seq(&fsm->stfsm_seq_en_32bit_addr);
1244 soc_reset = stfsm_can_handle_soc_reset(fsm);
1245 if (soc_reset || !fsm->booted_from_spi) {
1250 stfsm_enter_32bit_addr(fsm, 1);
1256 fsm->configuration = (CFG_WRITE_TOGGLE_32BIT_ADDR |
1266 stfsm_write_status(fsm, N25Q_CMD_WRVCR, vcr, 1, 0);
1284 static void stfsm_s25fl_read_dyb(struct stfsm *fsm, uint32_t offs, uint8_t *dby)
1311 stfsm_load_seq(fsm, &seq);
1313 stfsm_read_fifo(fsm, &tmp, 4);
1317 stfsm_wait_seq(fsm);
1320 static void stfsm_s25fl_write_dyb(struct stfsm *fsm, uint32_t offs, uint8_t dby)
1349 stfsm_load_seq(fsm, &seq);
1350 stfsm_wait_seq(fsm);
1352 stfsm_wait_busy(fsm);
1355 static int stfsm_s25fl_clear_status_reg(struct stfsm *fsm)
1379 stfsm_load_seq(fsm, &seq);
1381 stfsm_wait_seq(fsm);
1386 static int stfsm_s25fl_config(struct stfsm *fsm)
1388 struct flash_info *info = fsm->info;
1402 ret = stfsm_search_prepare_rw_seq(fsm, &fsm->stfsm_seq_read,
1407 ret = stfsm_search_prepare_rw_seq(fsm, &fsm->stfsm_seq_write,
1416 ret = stfsm_prepare_rwe_seqs_default(fsm);
1429 stfsm_s25fl_read_dyb(fsm, offs, &dyb);
1431 stfsm_s25fl_write_dyb(fsm, offs, 0xff);
1443 stfsm_read_status(fsm, SPINOR_OP_RDCR, &cr1, 1);
1444 data_pads = ((fsm->stfsm_seq_read.seq_cfg >> 16) & 0x3) + 1;
1461 stfsm_read_status(fsm, SPINOR_OP_RDSR, &sr1, 1);
1463 stfsm_write_status(fsm, SPINOR_OP_WRSR, sta_wr, 2, 1);
1470 fsm->configuration |= CFG_S25FL_CHECK_ERROR_FLAGS;
1475 static int stfsm_w25q_config(struct stfsm *fsm)
1483 ret = stfsm_prepare_rwe_seqs_default(fsm);
1488 stfsm_read_status(fsm, SPINOR_OP_RDCR, &sr2, 1);
1489 data_pads = ((fsm->stfsm_seq_read.seq_cfg >> 16) & 0x3) + 1;
1505 stfsm_read_status(fsm, SPINOR_OP_RDSR, &sr1, 1);
1507 stfsm_write_status(fsm, SPINOR_OP_WRSR, sr_wr, 2, 1);
1513 static int stfsm_read(struct stfsm *fsm, uint8_t *buf, uint32_t size,
1516 struct stfsm_seq *seq = &fsm->stfsm_seq_read;
1526 dev_dbg(fsm->dev, "reading %d bytes from 0x%08x\n", size, offset);
1529 if (fsm->configuration & CFG_READ_TOGGLE_32BIT_ADDR)
1530 stfsm_enter_32bit_addr(fsm, 1);
1548 stfsm_load_seq(fsm, seq);
1551 stfsm_read_fifo(fsm, (uint32_t *)p, size_lb);
1554 stfsm_read_fifo(fsm, tmp, read_mask + 1);
1563 stfsm_wait_seq(fsm);
1565 stfsm_clear_fifo(fsm);
1568 if (fsm->configuration & CFG_READ_TOGGLE_32BIT_ADDR)
1569 stfsm_enter_32bit_addr(fsm, 0);
1574 static int stfsm_write(struct stfsm *fsm, const uint8_t *buf,
1577 struct stfsm_seq *seq = &fsm->stfsm_seq_write;
1590 dev_dbg(fsm->dev, "writing %d bytes to 0x%08x\n", size, offset);
1593 if (fsm->configuration & CFG_WRITE_TOGGLE_32BIT_ADDR)
1594 stfsm_enter_32bit_addr(fsm, 1);
1620 writel(0x00040000, fsm->base + SPI_FAST_SEQ_CFG);
1626 if (fsm->fifo_dir_delay == 0)
1627 readl(fsm->base + SPI_FAST_SEQ_CFG);
1629 udelay(fsm->fifo_dir_delay);
1634 stfsm_write_fifo(fsm, (uint32_t *)p, size_lb);
1644 stfsm_write_fifo(fsm, tmp, write_mask + 1);
1648 stfsm_load_seq(fsm, seq);
1651 stfsm_wait_seq(fsm);
1654 ret = stfsm_wait_busy(fsm);
1655 if (ret && fsm->configuration & CFG_S25FL_CHECK_ERROR_FLAGS)
1656 stfsm_s25fl_clear_status_reg(fsm);
1659 if (fsm->configuration & CFG_WRITE_TOGGLE_32BIT_ADDR)
1660 stfsm_enter_32bit_addr(fsm, 0);
1672 struct stfsm *fsm = dev_get_drvdata(mtd->dev.parent);
1675 dev_dbg(fsm->dev, "%s from 0x%08x, len %zd\n",
1678 mutex_lock(&fsm->lock);
1683 stfsm_read(fsm, buf, bytes, from);
1692 mutex_unlock(&fsm->lock);
1697 static int stfsm_erase_sector(struct stfsm *fsm, uint32_t offset)
1702 dev_dbg(fsm->dev, "erasing sector at 0x%08x\n", offset);
1705 if (fsm->configuration & CFG_ERASESEC_TOGGLE_32BIT_ADDR)
1706 stfsm_enter_32bit_addr(fsm, 1);
1711 stfsm_load_seq(fsm, seq);
1713 stfsm_wait_seq(fsm);
1716 ret = stfsm_wait_busy(fsm);
1717 if (ret && fsm->configuration & CFG_S25FL_CHECK_ERROR_FLAGS)
1718 stfsm_s25fl_clear_status_reg(fsm);
1721 if (fsm->configuration & CFG_ERASESEC_TOGGLE_32BIT_ADDR)
1722 stfsm_enter_32bit_addr(fsm, 0);
1727 static int stfsm_erase_chip(struct stfsm *fsm)
1731 dev_dbg(fsm->dev, "erasing chip\n");
1733 stfsm_load_seq(fsm, seq);
1735 stfsm_wait_seq(fsm);
1737 return stfsm_wait_busy(fsm);
1748 struct stfsm *fsm = dev_get_drvdata(mtd->dev.parent);
1755 dev_dbg(fsm->dev, "%s to 0x%08x, len %zd\n", __func__, (u32)to, len);
1760 mutex_lock(&fsm->lock);
1766 ret = stfsm_write(fsm, b, bytes, to);
1782 mutex_unlock(&fsm->lock);
1793 struct stfsm *fsm = dev_get_drvdata(mtd->dev.parent);
1797 dev_dbg(fsm->dev, "%s at 0x%llx, len %lld\n", __func__,
1803 mutex_lock(&fsm->lock);
1807 ret = stfsm_erase_chip(fsm);
1812 ret = stfsm_erase_sector(fsm, addr);
1821 mutex_unlock(&fsm->lock);
1826 mutex_unlock(&fsm->lock);
1831 static void stfsm_read_jedec(struct stfsm *fsm, uint8_t *jedec)
1836 stfsm_load_seq(fsm, seq);
1838 stfsm_read_fifo(fsm, tmp, 8);
1842 stfsm_wait_seq(fsm);
1845 static struct flash_info *stfsm_jedec_probe(struct stfsm *fsm)
1852 stfsm_read_jedec(fsm, id);
1862 dev_dbg(fsm->dev, "JEDEC = 0x%08x [%5ph]\n", jedec, id);
1871 dev_err(fsm->dev, "Unrecognized JEDEC id %06x\n", jedec);
1876 static int stfsm_set_mode(struct stfsm *fsm, uint32_t mode)
1882 ret = readl(fsm->base + SPI_STA_MODE_CHANGE);
1891 writel(mode, fsm->base + SPI_MODESELECT);
1896 static void stfsm_set_freq(struct stfsm *fsm, uint32_t spi_freq)
1901 emi_freq = clk_get_rate(fsm->clk);
1920 fsm->fifo_dir_delay = 0;
1922 fsm->fifo_dir_delay = 1;
1924 fsm->fifo_dir_delay = DIV_ROUND_UP(clk_div, 10);
1926 dev_dbg(fsm->dev, "emi_clk = %uHZ, spi_freq = %uHZ, clk_div = %u\n",
1929 writel(clk_div, fsm->base + SPI_CLOCKDIV);
1932 static int stfsm_init(struct stfsm *fsm)
1937 writel(SEQ_CFG_SWRESET, fsm->base + SPI_FAST_SEQ_CFG);
1939 writel(0, fsm->base + SPI_FAST_SEQ_CFG);
1942 stfsm_set_freq(fsm, STFSM_FLASH_SAFE_FREQ);
1945 ret = stfsm_set_mode(fsm, SPI_MODESELECT_FSM);
1954 fsm->base + SPI_CONFIGDATA);
1955 writel(STFSM_DEFAULT_WR_TIME, fsm->base + SPI_STATUS_WR_TIME_REG);
1962 writel(0x00000001, fsm->base + SPI_PROGRAM_ERASE_TIME);
1965 stfsm_clear_fifo(fsm);
1972 struct stfsm *fsm = platform_get_drvdata(pdev);
1981 fsm->booted_from_spi = true;
1987 fsm->reset_signal = of_property_read_bool(np, "st,reset-signal");
1989 fsm->reset_por = of_property_read_bool(np, "st,reset-por");
2006 fsm->booted_from_spi = false;
2020 struct stfsm *fsm;
2028 fsm = devm_kzalloc(&pdev->dev, sizeof(*fsm), GFP_KERNEL);
2029 if (!fsm)
2032 fsm->dev = &pdev->dev;
2034 platform_set_drvdata(pdev, fsm);
2042 fsm->base = devm_ioremap_resource(&pdev->dev, res);
2043 if (IS_ERR(fsm->base)) {
2046 return PTR_ERR(fsm->base);
2049 fsm->clk = devm_clk_get(&pdev->dev, NULL);
2050 if (IS_ERR(fsm->clk)) {
2051 dev_err(fsm->dev, "Couldn't find EMI clock.\n");
2052 return PTR_ERR(fsm->clk);
2055 ret = clk_prepare_enable(fsm->clk);
2057 dev_err(fsm->dev, "Failed to enable EMI clock.\n");
2061 mutex_init(&fsm->lock);
2063 ret = stfsm_init(fsm);
2072 info = stfsm_jedec_probe(fsm);
2077 fsm->info = info;
2088 ret = info->config(fsm);
2092 ret = stfsm_prepare_rwe_seqs_default(fsm);
2097 fsm->mtd.name = info->name;
2098 fsm->mtd.dev.parent = &pdev->dev;
2099 mtd_set_of_node(&fsm->mtd, np);
2100 fsm->mtd.type = MTD_NORFLASH;
2101 fsm->mtd.writesize = 4;
2102 fsm->mtd.writebufsize = fsm->mtd.writesize;
2103 fsm->mtd.flags = MTD_CAP_NORFLASH;
2104 fsm->mtd.size = info->sector_size * info->n_sectors;
2105 fsm->mtd.erasesize = info->sector_size;
2107 fsm->mtd._read = stfsm_mtd_read;
2108 fsm->mtd._write = stfsm_mtd_write;
2109 fsm->mtd._erase = stfsm_mtd_erase;
2115 (long long)fsm->mtd.size, (long long)(fsm->mtd.size >> 20),
2116 fsm->mtd.erasesize, (fsm->mtd.erasesize >> 10));
2118 ret = mtd_device_register(&fsm->mtd, NULL, 0);
2121 clk_disable_unprepare(fsm->clk);
2129 struct stfsm *fsm = platform_get_drvdata(pdev);
2131 return mtd_device_unregister(&fsm->mtd);
2137 struct stfsm *fsm = dev_get_drvdata(dev);
2139 clk_disable_unprepare(fsm->clk);
2146 struct stfsm *fsm = dev_get_drvdata(dev);
2148 return clk_prepare_enable(fsm->clk);
2155 { .compatible = "st,spi-fsm", },
2164 .name = "st-spi-fsm",