Lines Matching defs:SDMMC_CTLR
37 #define SDMMC_CTLR 0x00
59 /* SDMMC_CTLR bit fields */
250 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
251 writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR);
268 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
269 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);
281 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
283 priv->sdmmc_base + SDMMC_CTLR);
474 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
475 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);