Lines Matching defs:addrbase
334 void __iomem *addrbase = host->sdhc_mmiobase;
338 readl(addrbase + VIA_CRDR_SDCTRL),
339 readl(addrbase + VIA_CRDR_SDCARG),
340 readl(addrbase + VIA_CRDR_SDBUSMODE));
342 readl(addrbase + VIA_CRDR_SDBLKLEN),
343 readl(addrbase + VIA_CRDR_SDCURBLKCNT),
344 readl(addrbase + VIA_CRDR_SDINTMASK));
346 readl(addrbase + VIA_CRDR_SDSTATUS),
347 readl(addrbase + VIA_CRDR_SDCLKSEL),
348 readl(addrbase + VIA_CRDR_SDEXTCTRL));
353 void __iomem *addrbase = host->pcictrl_mmiobase;
357 readb(addrbase + VIA_CRDR_PCICLKGATT),
358 readb(addrbase + VIA_CRDR_PCISDCCLK),
359 readb(addrbase + VIA_CRDR_PCIDMACLK));
361 readb(addrbase + VIA_CRDR_PCIINTCTRL),
362 readb(addrbase + VIA_CRDR_PCIINTSTATUS));
368 void __iomem *addrbase;
371 addrbase = host->pcictrl_mmiobase;
373 pm_pcictrl_reg->pciclkgat_reg = readb(addrbase + VIA_CRDR_PCICLKGATT);
376 pm_pcictrl_reg->pcisdclk_reg = readb(addrbase + VIA_CRDR_PCISDCCLK);
377 pm_pcictrl_reg->pcidmaclk_reg = readb(addrbase + VIA_CRDR_PCIDMACLK);
378 pm_pcictrl_reg->pciintctrl_reg = readb(addrbase + VIA_CRDR_PCIINTCTRL);
380 readb(addrbase + VIA_CRDR_PCIINTSTATUS);
381 pm_pcictrl_reg->pcitmoctrl_reg = readb(addrbase + VIA_CRDR_PCITMOCTRL);
387 void __iomem *addrbase;
390 addrbase = host->pcictrl_mmiobase;
392 writeb(pm_pcictrl_reg->pciclkgat_reg, addrbase + VIA_CRDR_PCICLKGATT);
393 writeb(pm_pcictrl_reg->pcisdclk_reg, addrbase + VIA_CRDR_PCISDCCLK);
394 writeb(pm_pcictrl_reg->pcidmaclk_reg, addrbase + VIA_CRDR_PCIDMACLK);
395 writeb(pm_pcictrl_reg->pciintctrl_reg, addrbase + VIA_CRDR_PCIINTCTRL);
397 addrbase + VIA_CRDR_PCIINTSTATUS);
398 writeb(pm_pcictrl_reg->pcitmoctrl_reg, addrbase + VIA_CRDR_PCITMOCTRL);
404 void __iomem *addrbase;
407 addrbase = host->sdhc_mmiobase;
409 pm_sdhc_reg->sdcontrol_reg = readl(addrbase + VIA_CRDR_SDCTRL);
410 pm_sdhc_reg->sdcmdarg_reg = readl(addrbase + VIA_CRDR_SDCARG);
411 pm_sdhc_reg->sdbusmode_reg = readl(addrbase + VIA_CRDR_SDBUSMODE);
412 pm_sdhc_reg->sdblklen_reg = readl(addrbase + VIA_CRDR_SDBLKLEN);
413 pm_sdhc_reg->sdcurblkcnt_reg = readl(addrbase + VIA_CRDR_SDCURBLKCNT);
414 pm_sdhc_reg->sdintmask_reg = readl(addrbase + VIA_CRDR_SDINTMASK);
415 pm_sdhc_reg->sdstatus_reg = readl(addrbase + VIA_CRDR_SDSTATUS);
416 pm_sdhc_reg->sdrsptmo_reg = readl(addrbase + VIA_CRDR_SDRSPTMO);
417 pm_sdhc_reg->sdclksel_reg = readl(addrbase + VIA_CRDR_SDCLKSEL);
418 pm_sdhc_reg->sdextctrl_reg = readl(addrbase + VIA_CRDR_SDEXTCTRL);
424 void __iomem *addrbase;
427 addrbase = host->sdhc_mmiobase;
429 writel(pm_sdhc_reg->sdcontrol_reg, addrbase + VIA_CRDR_SDCTRL);
430 writel(pm_sdhc_reg->sdcmdarg_reg, addrbase + VIA_CRDR_SDCARG);
431 writel(pm_sdhc_reg->sdbusmode_reg, addrbase + VIA_CRDR_SDBUSMODE);
432 writel(pm_sdhc_reg->sdblklen_reg, addrbase + VIA_CRDR_SDBLKLEN);
433 writel(pm_sdhc_reg->sdcurblkcnt_reg, addrbase + VIA_CRDR_SDCURBLKCNT);
434 writel(pm_sdhc_reg->sdintmask_reg, addrbase + VIA_CRDR_SDINTMASK);
435 writel(pm_sdhc_reg->sdstatus_reg, addrbase + VIA_CRDR_SDSTATUS);
436 writel(pm_sdhc_reg->sdrsptmo_reg, addrbase + VIA_CRDR_SDRSPTMO);
437 writel(pm_sdhc_reg->sdclksel_reg, addrbase + VIA_CRDR_SDCLKSEL);
438 writel(pm_sdhc_reg->sdextctrl_reg, addrbase + VIA_CRDR_SDEXTCTRL);
452 void __iomem *addrbase;
461 addrbase = host->ddma_mmiobase;
463 writel(dmaaddr, addrbase + VIA_CRDR_DMABASEADD);
464 writel(count, addrbase + VIA_CRDR_DMACOUNTER);
465 writel(ctrl_data, addrbase + VIA_CRDR_DMACTRL);
466 writel(0x01, addrbase + VIA_CRDR_DMASTART);
470 addrbase = host->pcictrl_mmiobase;
471 if (readb(addrbase + VIA_CRDR_PCISDCCLK) == PCI_CLK_375K) {
473 writeb(PCI_CLK_8M, addrbase + VIA_CRDR_PCISDCCLK);
480 void __iomem *addrbase;
500 addrbase = host->sdhc_mmiobase;
506 writel(blk_reg, addrbase + VIA_CRDR_SDBLKLEN);
512 void __iomem *addrbase = host->sdhc_mmiobase;
513 u32 dwdata0 = readl(addrbase + VIA_CRDR_SDRESP0);
514 u32 dwdata1 = readl(addrbase + VIA_CRDR_SDRESP1);
515 u32 dwdata2 = readl(addrbase + VIA_CRDR_SDRESP2);
516 u32 dwdata3 = readl(addrbase + VIA_CRDR_SDRESP3);
554 void __iomem *addrbase;
620 addrbase = host->sdhc_mmiobase;
621 writel(cmd->arg, addrbase + VIA_CRDR_SDCARG);
622 writel(cmdctrl, addrbase + VIA_CRDR_SDCTRL);
663 void __iomem *addrbase;
672 addrbase = host->pcictrl_mmiobase;
673 writeb(VIA_CRDR_PCIDMACLK_SDC, addrbase + VIA_CRDR_PCIDMACLK);
723 void __iomem *addrbase;
731 addrbase = host->sdhc_mmiobase;
732 org_data = readl(addrbase + VIA_CRDR_SDBUSMODE);
733 sdextctrl = readl(addrbase + VIA_CRDR_SDEXTCTRL);
750 writel(org_data, addrbase + VIA_CRDR_SDBUSMODE);
751 writel(sdextctrl, addrbase + VIA_CRDR_SDEXTCTRL);
768 addrbase = host->pcictrl_mmiobase;
769 if (readb(addrbase + VIA_CRDR_PCISDCCLK) != clock)
770 writeb(clock, addrbase + VIA_CRDR_PCISDCCLK);
874 void __iomem *addrbase;
884 addrbase = sdhost->pcictrl_mmiobase;
885 pci_status = readb(addrbase + VIA_CRDR_PCIINTSTATUS);
891 addrbase = sdhost->sdhc_mmiobase;
892 sd_status = readw(addrbase + VIA_CRDR_SDSTATUS);
902 addrbase + VIA_CRDR_SDSTATUS);
910 addrbase + VIA_CRDR_SDSTATUS);
915 addrbase + VIA_CRDR_SDSTATUS);
923 writew(sd_status, addrbase + VIA_CRDR_SDSTATUS);
989 void __iomem *addrbase;
995 addrbase = host->ddma_mmiobase;
996 writel(VIA_CRDR_DMACTRL_SFTRST, addrbase + VIA_CRDR_DMACTRL);
1000 addrbase = host->pcictrl_mmiobase;
1001 writeb(VIA_CRDR_PCIDMACLK_SDC, addrbase + VIA_CRDR_PCIDMACLK);
1003 addrbase = host->sdhc_mmiobase;
1004 status = readw(addrbase + VIA_CRDR_SDSTATUS);
1031 void __iomem *addrbase;
1059 addrbase = host->sdhc_mmiobase;
1060 writel(0x0, addrbase + VIA_CRDR_SDINTMASK);
1064 writel(lenreg, addrbase + VIA_CRDR_SDBLKLEN);
1066 status = readw(addrbase + VIA_CRDR_SDSTATUS);
1068 writew(status, addrbase + VIA_CRDR_SDSTATUS);
1070 status = readw(addrbase + VIA_CRDR_SDSTATUS2);
1072 writew(status, addrbase + VIA_CRDR_SDSTATUS2);
1074 writeb(0x0, addrbase + VIA_CRDR_SDEXTCTRL);
1076 writel(VIA_CRDR_SDACTIVE_INTMASK, addrbase + VIA_CRDR_SDINTMASK);
1231 void __iomem *addrbase;
1236 addrbase = host->sdhc_mmiobase;
1238 writel(0x0, addrbase + VIA_CRDR_SDINTMASK);
1241 writel(lenreg, addrbase + VIA_CRDR_SDBLKLEN);
1243 status = readw(addrbase + VIA_CRDR_SDSTATUS);
1245 writew(status, addrbase + VIA_CRDR_SDSTATUS);
1247 status = readw(addrbase + VIA_CRDR_SDSTATUS2);
1249 writew(status, addrbase + VIA_CRDR_SDSTATUS2);
1251 writel(pm_sdhcreg->sdcontrol_reg, addrbase + VIA_CRDR_SDCTRL);
1252 writel(pm_sdhcreg->sdcmdarg_reg, addrbase + VIA_CRDR_SDCARG);
1253 writel(pm_sdhcreg->sdintmask_reg, addrbase + VIA_CRDR_SDINTMASK);
1254 writel(pm_sdhcreg->sdrsptmo_reg, addrbase + VIA_CRDR_SDRSPTMO);
1255 writel(pm_sdhcreg->sdclksel_reg, addrbase + VIA_CRDR_SDCLKSEL);
1256 writel(pm_sdhcreg->sdextctrl_reg, addrbase + VIA_CRDR_SDEXTCTRL);