Lines Matching refs:intmask
3241 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *intmask_p)
3244 if (intmask & SDHCI_INT_AUTO_CMD_ERR && host->data_cmd) {
3267 mmc_hostname(host->mmc), (unsigned)intmask);
3272 if (intmask & (SDHCI_INT_TIMEOUT | SDHCI_INT_CRC |
3274 if (intmask & SDHCI_INT_TIMEOUT)
3281 (intmask & (SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)) ==
3293 if (intmask & SDHCI_INT_AUTO_CMD_ERR) {
3307 if (intmask & SDHCI_INT_RESPONSE)
3343 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
3348 if (intmask & SDHCI_INT_DATA_AVAIL) {
3367 if (intmask & SDHCI_INT_DATA_TIMEOUT) {
3373 if (intmask & SDHCI_INT_DATA_END) {
3397 mmc_hostname(host->mmc), (unsigned)intmask);
3403 if (intmask & SDHCI_INT_DATA_TIMEOUT)
3405 else if (intmask & SDHCI_INT_DATA_END_BIT)
3407 else if ((intmask & SDHCI_INT_DATA_CRC) &&
3411 else if (intmask & SDHCI_INT_ADMA_ERROR) {
3413 intmask);
3417 host->ops->adma_workaround(host, intmask);
3423 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
3435 if (intmask & SDHCI_INT_DMA_END) {
3452 if (intmask & SDHCI_INT_DATA_END) {
3482 u32 intmask, mask, unexpected = 0;
3493 intmask = sdhci_readl(host, SDHCI_INT_STATUS);
3494 if (!intmask || intmask == 0xffffffff) {
3500 DBG("IRQ status 0x%08x\n", intmask);
3503 intmask = host->ops->irq(host, intmask);
3504 if (!intmask)
3509 mask = intmask & (SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
3513 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
3535 sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
3538 host->thread_isr |= intmask & (SDHCI_INT_CARD_INSERT |
3543 if (intmask & SDHCI_INT_CMD_MASK)
3544 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK, &intmask);
3546 if (intmask & SDHCI_INT_DATA_MASK)
3547 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
3549 if (intmask & SDHCI_INT_BUS_POWER)
3553 if (intmask & SDHCI_INT_RETUNE)
3556 if ((intmask & SDHCI_INT_CARD_INT) &&
3562 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE |
3567 if (intmask) {
3568 unexpected |= intmask;
3569 sdhci_writel(host, intmask, SDHCI_INT_STATUS);
3575 intmask = sdhci_readl(host, SDHCI_INT_STATUS);
3576 } while (intmask && --max_loops);
3927 bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
3935 if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC))
3937 else if (intmask & SDHCI_INT_TIMEOUT)
3942 if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC))
3944 else if (intmask & SDHCI_INT_DATA_TIMEOUT)
3946 else if (intmask & SDHCI_INT_ADMA_ERROR)
3952 mask = intmask & host->cqe_ier;
3955 if (intmask & SDHCI_INT_BUS_POWER)
3959 intmask &= ~(host->cqe_ier | SDHCI_INT_ERROR);
3960 if (intmask) {
3961 sdhci_writel(host, intmask, SDHCI_INT_STATUS);
3963 mmc_hostname(host->mmc), intmask);