Lines Matching refs:value
84 /* Preferred ZNR and ZPR value vary between different boards.
85 * The specific ZNR and ZPR value should be defined here
131 /* value in Logic Timing Adjustment register */
257 /* Use the possibly slowest bus frequency value */
340 * Set Phase as 90 degree, which is most common value.
341 * Might set another value if necessary.
396 "HS200 TUNING_STEP %d is larger than MAX value\n",
596 * Set preferred ZNR and ZPR value
597 * The ZNR and ZPR value vary between different boards.
638 /* Hardware team recommend a value for HS400 */
696 u32 value;
703 if (!of_property_read_u32(np, "marvell,xenon-phy-znr", &value))
704 params->znr = value & XENON_ZNR_MASK;
707 if (!of_property_read_u32(np, "marvell,xenon-phy-zpr", &value))
708 params->zpr = value & XENON_ZPR_MASK;
712 &value))
713 params->nr_tun_times = value & XENON_TUN_CONSECUTIVE_TIMES_MASK;
717 &value))
718 params->tun_step_divider = value & 0xFF;
757 * default value of DDR mode.