Lines Matching refs:phy_regs
233 struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
235 reg = sdhci_readl(host, phy_regs->timing_adj);
237 sdhci_writel(host, reg, phy_regs->timing_adj);
265 reg = sdhci_readl(host, phy_regs->timing_adj);
325 struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
331 reg = sdhci_readl(host, phy_regs->dll_ctrl);
336 reg = sdhci_readl(host, phy_regs->dll_ctrl);
350 reg |= phy_regs->dll_update;
353 sdhci_writel(host, reg, phy_regs->dll_ctrl);
495 struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
502 reg = sdhci_readl(host, phy_regs->timing_adj);
536 sdhci_writel(host, reg, phy_regs->timing_adj);
551 struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs;
556 reg = sdhci_readl(host, phy_regs->pad_ctrl);
561 sdhci_writel(host, reg, phy_regs->pad_ctrl);
585 reg = sdhci_readl(host, phy_regs->timing_adj);
590 sdhci_writel(host, reg, phy_regs->timing_adj);
600 reg = sdhci_readl(host, phy_regs->pad_ctrl2);
603 sdhci_writel(host, reg, phy_regs->pad_ctrl2);
613 reg = sdhci_readl(host, phy_regs->func_ctrl);
630 sdhci_writel(host, reg, phy_regs->func_ctrl);
639 sdhci_writel(host, phy_regs->logic_timing_val,
640 phy_regs->logic_timing_adj);