Lines Matching defs:tap
328 static void tegra_sdhci_set_tap(struct sdhci_host *host, unsigned int tap)
337 * Touching the tap values is a bit tricky on some SoC generations.
339 * the tap values are changed.
347 reg |= tap << SDHCI_CLOCK_CTRL_TAP_SHIFT;
711 err = device_property_read_u32(host->mmc->parent, "nvidia,default-tap",
845 u8 word, bit, edge1, tap, window;
870 tap = word * TUNING_WORD_BIT_SIZE + bit;
875 first_fail_tap = tap;
880 start_pass_tap = tap;
883 first_pass_tap = tap;
889 end_pass_tap = tap - 1;
896 start_pass_tap = tap;
899 /* set tap at middle of valid window */
900 tap = start_pass_tap + window / 2;
901 tegra_host->tuned_tap_delay = tap;
913 /* set tap location at fixed tap relative to the first edge */
933 /* retain HW tuned tap to use incase if no correction is needed */
951 * fixed tap is used when HW tuning result contains single edge
952 * and tap is set at fixed tap delay relative to the first edge
1009 /* Don't set default tap on tunable modes. */
1060 * Start search for minimum tap value at 10, as smaller values are
1072 /* Find the maximum tap value that still passes. */
1083 /* The TRM states the ideal tap value is at 75% in the passing range. */