Lines Matching defs:host
16 #include <linux/mmc/host.h>
119 struct sdhci_host *host)
122 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
126 host->quirks &= ~SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN;
127 host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
129 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES);
130 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
145 host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50);
156 host->caps &= ~SDHCI_CAN_VDD_180;
157 host->mmc->caps &= ~MMC_CAP_1_8V_DDR;
159 host->caps &= ~SDHCI_CAN_VDD_330;
161 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_USE_SDR50_TUNING);
166 static void pxav3_reset(struct sdhci_host *host, u8 mask)
168 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
171 sdhci_reset(host, mask);
181 tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP);
185 writew(tmp, host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP);
191 static void pxav3_gen_init_74_clocks(struct sdhci_host *host, u8 power_mode)
193 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
201 dev_dbg(mmc_dev(host->mmc),
209 tmp = readw(host->ioaddr + SD_CE_ATA_2);
211 writew(tmp, host->ioaddr + SD_CE_ATA_2);
214 tmp = readw(host->ioaddr + SD_CFG_FIFO_PARAM);
216 writew(tmp, host->ioaddr + SD_CFG_FIFO_PARAM);
223 if ((readw(host->ioaddr + SD_CE_ATA_2)
230 dev_warn(mmc_dev(host->mmc), "74 clock interrupt not cleared\n");
233 tmp = readw(host->ioaddr + SD_CE_ATA_2);
235 writew(tmp, host->ioaddr + SD_CE_ATA_2);
240 static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
242 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
250 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
252 /* Select Bus Speed Mode for host */
294 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
295 dev_dbg(mmc_dev(host->mmc),
300 static void pxav3_set_power(struct sdhci_host *host, unsigned char mode,
303 struct mmc_host *mmc = host->mmc;
304 u8 pwr = host->pwr;
306 sdhci_set_power_noreg(host, mode, vdd);
308 if (host->pwr == pwr)
311 if (host->pwr == 0)
377 struct sdhci_host *host = NULL;
382 host = sdhci_pltfm_init(pdev, &sdhci_pxav3_pdata, sizeof(*pxa));
383 if (IS_ERR(host))
384 return PTR_ERR(host);
386 pltfm_host = sdhci_priv(host);
405 host->mmc->caps |= MMC_CAP_1_8V_DDR;
408 ret = armada_38x_quirks(pdev, host);
418 ret = mmc_of_parse(host->mmc);
427 host->mmc->caps |= MMC_CAP_NONREMOVABLE;
431 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
434 host->quirks |= pdata->quirks;
436 host->quirks2 |= pdata->quirks2;
438 host->mmc->caps |= pdata->host_caps;
440 host->mmc->caps2 |= pdata->host_caps2;
442 host->mmc->pm_caps |= pdata->pm_caps;
452 ret = sdhci_add_host(host);
456 if (host->mmc->pm_caps & MMC_PM_WAKE_SDIO_IRQ)
477 struct sdhci_host *host = platform_get_drvdata(pdev);
478 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
485 sdhci_remove_host(host, 1);
499 struct sdhci_host *host = dev_get_drvdata(dev);
502 if (host->tuning_mode != SDHCI_TUNING_MODE_3)
503 mmc_retune_needed(host->mmc);
504 ret = sdhci_suspend_host(host);
514 struct sdhci_host *host = dev_get_drvdata(dev);
517 ret = sdhci_resume_host(host);
528 struct sdhci_host *host = dev_get_drvdata(dev);
529 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
533 ret = sdhci_runtime_suspend_host(host);
537 if (host->tuning_mode != SDHCI_TUNING_MODE_3)
538 mmc_retune_needed(host->mmc);
549 struct sdhci_host *host = dev_get_drvdata(dev);
550 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
557 return sdhci_runtime_resume_host(host, 0);