Lines Matching defs:clock
36 #define SDHCI_AT91_PRESET_COMMON_CONF 0x400 /* drv type B, programmable clock mode */
62 static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock)
69 * There is no requirement to disable the internal clock before
70 * changing the SD clock configuration. Moreover, disabling the
71 * internal clock, changing the configuration and re-enabling the
72 * internal clock causes some bugs. It can prevent to get the internal
73 * clock stable flag ready and an unexpected switch to the base clock
80 if (clock == 0)
83 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
91 pr_err("%s: Internal clock never stabilised.\n",
207 * maximum sd clock value is 120 MHz instead of 208 MHz. For that