Lines Matching refs:reset
19 #include <linux/reset.h>
893 * Retuning in HS400 (DDR mode) will fail, just reset the
998 * configuration on reset. Currently reprogramming the power on
999 * reset (POR) value in case it might have been modified by
1073 * Retuning in HS400 (DDR mode) will fail, just reset the
1203 /* First of all reset the tuning block */
1525 * SDHCI_HOST_CONTROL2 register. The reset state of that bit is 0
1594 * lost when actual reset and clear/read of status register is
1900 /* Disable cqe reset due to cqe enable signal */
2195 .reset = sdhci_msm_reset,
2238 struct reset_control *reset;
2241 reset = reset_control_get_optional_exclusive(dev, NULL);
2242 if (IS_ERR(reset))
2243 return dev_err_probe(dev, PTR_ERR(reset),
2246 if (!reset)
2249 ret = reset_control_assert(reset);
2251 reset_control_put(reset);
2262 ret = reset_control_deassert(reset);
2264 reset_control_put(reset);
2269 reset_control_put(reset);
2411 /* Reset the vendor spec register to power on reset state */
2468 * Power on reset state may trigger power irq if previous status of