Lines Matching refs:val
47 u32 mask, u32 val, int reg)
53 val <<= shift;
56 val |= ESDHC_PROCTL_D3CD;
58 writel((readl(base) & ~mask) | val, base);
65 static void esdhc_mcf_writeb_be(struct sdhci_host *host, u8 val, int reg)
73 u8 dma_bits = (val & SDHCI_CTRL_DMA_MASK) >> 3;
83 host_ctrl |= val;
90 writel((readl(base) & mask) | (val << shift), base);
93 static void esdhc_mcf_writew_be(struct sdhci_host *host, u16 val, int reg)
103 mcf_data->aside = val;
107 val |= SDHCI_CMD_ABORTCMD;
113 writel(val << 16 | mcf_data->aside,
118 writel((readl(base) & mask) | (val << shift), base);
121 static void esdhc_mcf_writel_be(struct sdhci_host *host, u32 val, int reg)
123 writel(val, host->ioaddr + reg);
130 u16 val = readw(base + 2);
131 u8 dma_bits = (val >> 5) & SDHCI_CTRL_DMA_MASK;
132 u8 host_ctrl = val & 0xff;
157 u32 val;
159 val = readl(host->ioaddr + reg);
166 val &= ~SDHCI_CAN_DO_HISPD;
169 if (val & ESDHC_INT_VENDOR_SPEC_DMA_ERR) {
170 val &= ~ESDHC_INT_VENDOR_SPEC_DMA_ERR;
171 val |= SDHCI_INT_ADMA_ERROR;
175 return val;