Lines Matching refs:ESDHC_MIX_CTRL
60 #define ESDHC_MIX_CTRL 0x48
549 val = readl(host->ioaddr + ESDHC_MIX_CTRL);
567 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
609 new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);
617 writel(new_val , host->ioaddr + ESDHC_MIX_CTRL);
620 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
638 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
654 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
661 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
802 new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);
804 host->ioaddr + ESDHC_MIX_CTRL);
989 reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
992 writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
1003 reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
1006 writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
1050 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
1055 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
1150 ctrl = readl(host->ioaddr + ESDHC_MIX_CTRL);
1153 writel(ctrl, host->ioaddr + ESDHC_MIX_CTRL);
1186 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
1197 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
1202 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
1216 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
1444 * will also clear the DMAEN/BCEN of register ESDHC_MIX_CTRL.
1611 writel(0x0, host->ioaddr + ESDHC_MIX_CTRL);