Lines Matching defs:host
9 #include <linux/mmc/host.h>
43 static inline void enable_clock_gating(struct sdhci_host *host)
47 reg = sdhci_readl(host, SDHCI_VENDOR);
49 sdhci_writel(host, reg, SDHCI_VENDOR);
52 void brcmstb_reset(struct sdhci_host *host, u8 mask)
54 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
57 sdhci_and_cqhci_reset(host, mask);
61 enable_clock_gating(host);
66 struct sdhci_host *host = mmc_priv(mmc);
72 reg = readl(host->ioaddr + SDHCI_VENDOR);
77 writel(reg, host->ioaddr + SDHCI_VENDOR);
80 static void sdhci_brcmstb_set_clock(struct sdhci_host *host, unsigned int clock)
84 host->mmc->actual_clock = 0;
86 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
87 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
92 sdhci_enable_clk(host, clk);
95 static void sdhci_brcmstb_set_uhs_signaling(struct sdhci_host *host,
100 dev_dbg(mmc_dev(host->mmc), "%s: Setting UHS signaling for %d timing\n",
102 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
103 /* Select Bus Speed Mode for host */
121 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
131 struct sdhci_host *host = mmc_priv(mmc);
134 reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
136 sdhci_readl(host, SDHCI_BUFFER);
137 reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
187 static u32 sdhci_brcmstb_cqhci_irq(struct sdhci_host *host, u32 intmask)
192 if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
195 cqhci_irq(host->mmc, intmask, cmd_error, data_error);
200 static int sdhci_brcmstb_add_host(struct sdhci_host *host,
208 return sdhci_add_host(host);
210 dev_dbg(mmc_dev(host->mmc), "CQE is enabled\n");
211 host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
212 ret = sdhci_setup_host(host);
216 cq_host = devm_kzalloc(mmc_dev(host->mmc),
223 cq_host->mmio = host->ioaddr + SDHCI_ARASAN_CQE_BASE_ADDR;
226 dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
228 dev_dbg(mmc_dev(host->mmc), "Using 64 bit DMA\n");
232 ret = cqhci_init(cq_host, host->mmc, dma64);
236 ret = __sdhci_add_host(host);
243 sdhci_cleanup_host(host);
254 struct sdhci_host *host;
275 host = sdhci_pltfm_init(pdev, &brcmstb_pdata,
277 if (IS_ERR(host)) {
278 res = PTR_ERR(host);
282 pltfm_host = sdhci_priv(host);
298 res = mmc_of_parse(host->mmc);
307 (host->mmc->caps & MMC_CAP_NONREMOVABLE))
315 (host->mmc->caps2 & MMC_CAP2_HS400_ES))
316 host->mmc_host_ops.hs400_enhanced_strobe = match_priv->hs400es;
323 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES);
325 host->caps &= ~SDHCI_CAN_64BIT;
326 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
327 host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
329 host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
332 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
334 res = sdhci_brcmstb_add_host(host, priv);