Lines Matching defs:host

21 #include <linux/mmc/host.h>
56 static int mvsd_setup_data(struct mvsd_host *host, struct mmc_data *data)
58 void __iomem *iobase = host->base;
77 dev_warn(host->dev, "FIFO_EMPTY bit missing\n");
82 dev_dbg(host->dev, "*** wait for FIFO_EMPTY bit "
88 tmout = DIV_ROUND_UP(data->timeout_ns, host->ns_per_clk);
96 dev_dbg(host->dev, "data %s at 0x%08x: blocks=%d blksz=%d tmout=%u (%d)\n",
101 host->ctrl &= ~MVSD_HOST_CTRL_TMOUT_MASK;
102 host->ctrl |= MVSD_HOST_CTRL_TMOUT(tmout_index);
103 mvsd_write(MVSD_HOST_CTRL, host->ctrl);
113 * It also appears the host to card DMA can corrupt
117 host->pio_size = data->blocks * data->blksz;
118 host->pio_ptr = sg_virt(data->sg);
120 dev_dbg(host->dev, "fallback to PIO for data at 0x%p size %d\n",
121 host->pio_ptr, host->pio_size);
126 host->sg_frags = dma_map_sg(mmc_dev(host->mmc),
138 struct mvsd_host *host = mmc_priv(mmc);
139 void __iomem *iobase = host->base;
145 BUG_ON(host->mrq != NULL);
146 host->mrq = mrq;
148 dev_dbg(host->dev, "cmd %d (hw state 0x%04x)\n",
182 pio = mvsd_setup_data(host, data);
188 else if (host->pio_size > 32)
220 spin_lock_irqsave(&host->lock, flags);
222 host->xfer_mode &= MVSD_XFER_MODE_INT_CHK_EN;
223 host->xfer_mode |= xfer;
224 mvsd_write(MVSD_XFER_MODE, host->xfer_mode);
230 host->intr_en &= MVSD_NOR_CARD_INT;
231 host->intr_en |= intr | MVSD_NOR_ERROR;
232 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
236 mod_timer(&host->timer, jiffies + msecs_to_jiffies(timeout));
238 spin_unlock_irqrestore(&host->lock, flags);
241 static u32 mvsd_finish_cmd(struct mvsd_host *host, struct mmc_command *cmd,
244 void __iomem *iobase = host->base;
286 static u32 mvsd_finish_data(struct mvsd_host *host, struct mmc_data *data,
289 void __iomem *iobase = host->base;
291 if (host->pio_ptr) {
292 host->pio_ptr = NULL;
293 host->pio_size = 0;
295 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_frags,
308 dev_dbg(host->dev, "data done: blocks_left=%d, bytes_left=%d\n",
330 dev_dbg(host->dev, "c12err 0x%04x\n", err_cmd12);
346 struct mvsd_host *host = dev;
347 void __iomem *iobase = host->base;
352 dev_dbg(host->dev, "intr 0x%04x intr_en 0x%04x hw_state 0x%04x\n",
362 dev_dbg(host->dev, "spurious irq detected intr 0x%04x intr_en 0x%04x erri 0x%04x erri_en 0x%04x\n",
370 spin_lock(&host->lock);
373 if (host->pio_size &&
374 (intr_status & host->intr_en &
376 u16 *p = host->pio_ptr;
377 int s = host->pio_size;
405 host->intr_en &=
407 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
408 } else if (host->intr_en & MVSD_NOR_RX_FIFO_8W) {
409 host->intr_en &= ~MVSD_NOR_RX_FIFO_8W;
410 host->intr_en |= MVSD_NOR_RX_READY;
411 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
414 dev_dbg(host->dev, "pio %d intr 0x%04x hw_state 0x%04x\n",
416 host->pio_ptr = p;
417 host->pio_size = s;
419 } else if (host->pio_size &&
420 (intr_status & host->intr_en &
422 u16 *p = host->pio_ptr;
423 int s = host->pio_size;
446 host->intr_en &=
448 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
451 dev_dbg(host->dev, "pio %d intr 0x%04x hw_state 0x%04x\n",
453 host->pio_ptr = p;
454 host->pio_size = s;
462 if (intr_status & host->intr_en & ~intr_done_mask) {
463 struct mmc_request *mrq = host->mrq;
467 del_timer(&host->timer);
468 host->mrq = NULL;
470 host->intr_en &= MVSD_NOR_CARD_INT;
471 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
474 spin_unlock(&host->lock);
480 dev_dbg(host->dev, "err 0x%04x\n", err_status);
483 err_status = mvsd_finish_cmd(host, cmd, err_status);
485 err_status = mvsd_finish_data(host, mrq->data, err_status);
487 dev_err(host->dev, "unhandled error status %#04x\n",
492 mmc_request_done(host->mmc, mrq);
495 spin_unlock(&host->lock);
498 mmc_signal_sdio_irq(host->mmc);
505 dev_err(host->dev, "unhandled interrupt status=0x%04x en=0x%04x pio=%d\n",
506 intr_status, host->intr_en, host->pio_size);
512 struct mvsd_host *host = from_timer(host, t, timer);
513 void __iomem *iobase = host->base;
517 spin_lock_irqsave(&host->lock, flags);
518 mrq = host->mrq;
520 dev_err(host->dev, "Timeout waiting for hardware interrupt.\n");
521 dev_err(host->dev, "hw_state=0x%04x, intr_status=0x%04x intr_en=0x%04x\n",
526 host->mrq = NULL;
530 host->xfer_mode &= MVSD_XFER_MODE_INT_CHK_EN;
531 mvsd_write(MVSD_XFER_MODE, host->xfer_mode);
533 host->intr_en &= MVSD_NOR_CARD_INT;
534 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
539 mvsd_finish_cmd(host, mrq->cmd, 0);
542 mvsd_finish_data(host, mrq->data, 0);
545 spin_unlock_irqrestore(&host->lock, flags);
548 mmc_request_done(host->mmc, mrq);
553 struct mvsd_host *host = mmc_priv(mmc);
554 void __iomem *iobase = host->base;
557 spin_lock_irqsave(&host->lock, flags);
559 host->xfer_mode |= MVSD_XFER_MODE_INT_CHK_EN;
560 host->intr_en |= MVSD_NOR_CARD_INT;
562 host->xfer_mode &= ~MVSD_XFER_MODE_INT_CHK_EN;
563 host->intr_en &= ~MVSD_NOR_CARD_INT;
565 mvsd_write(MVSD_XFER_MODE, host->xfer_mode);
566 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
567 spin_unlock_irqrestore(&host->lock, flags);
570 static void mvsd_power_up(struct mvsd_host *host)
572 void __iomem *iobase = host->base;
573 dev_dbg(host->dev, "power up\n");
584 static void mvsd_power_down(struct mvsd_host *host)
586 void __iomem *iobase = host->base;
587 dev_dbg(host->dev, "power down\n");
600 struct mvsd_host *host = mmc_priv(mmc);
601 void __iomem *iobase = host->base;
605 mvsd_power_up(host);
610 host->clock = 0;
611 dev_dbg(host->dev, "clock off\n");
612 } else if (ios->clock != host->clock) {
613 u32 m = DIV_ROUND_UP(host->base_clock, ios->clock) - 1;
617 host->clock = ios->clock;
618 host->ns_per_clk = 1000000000 / (host->base_clock / (m+1));
619 dev_dbg(host->dev, "clock=%d (%d), div=0x%04x\n",
620 ios->clock, host->base_clock / (m+1), m);
650 host->ctrl = ctrl_reg;
652 dev_dbg(host->dev, "ctrl 0x%04x: %s %s %s\n", ctrl_reg,
661 mvsd_power_down(host);
672 mv_conf_mbus_windows(struct mvsd_host *host,
675 void __iomem *iobase = host->base;
697 struct mvsd_host *host = NULL;
715 host = mmc_priv(mmc);
716 host->mmc = mmc;
717 host->dev = &pdev->dev;
726 host->clk = devm_clk_get(&pdev->dev, NULL);
727 if (IS_ERR(host->clk)) {
732 clk_prepare_enable(host->clk);
738 mmc->f_min = DIV_ROUND_UP(host->base_clock, MVSD_BASE_DIV_MAX);
748 host->base_clock = clk_get_rate(host->clk) / 2;
755 spin_lock_init(&host->lock);
757 host->base = devm_platform_ioremap_resource(pdev, 0);
758 if (IS_ERR(host->base)) {
759 ret = PTR_ERR(host->base);
766 mv_conf_mbus_windows(host, dram);
768 mvsd_power_down(host);
770 ret = devm_request_irq(&pdev->dev, irq, mvsd_irq, 0, DRIVER_NAME, host);
776 timer_setup(&host->timer, mvsd_timeout_timer, 0);
791 if (!IS_ERR(host->clk))
792 clk_disable_unprepare(host->clk);
803 struct mvsd_host *host = mmc_priv(mmc);
806 del_timer_sync(&host->timer);
807 mvsd_power_down(host);
809 if (!IS_ERR(host->clk))
810 clk_disable_unprepare(host->clk);