Lines Matching defs:sdr_set_field
593 static void sdr_set_field(void __iomem *reg, u32 field, u32 val)
700 sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1);
706 sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT,
774 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC,
783 sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC,
881 sdr_set_field(host->base + MSDC_CFG,
885 sdr_set_field(host->base + MSDC_CFG,
935 sdr_set_field(host->base + tune_reg,
1037 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1);
1363 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP,
1625 sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE,
1643 sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
1645 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
1650 sdr_set_field(host->base + MSDC_PATCH_BIT1,
1662 sdr_set_field(host->base + MSDC_PATCH_BIT2,
1672 sdr_set_field(host->base + MSDC_PATCH_BIT2,
1674 sdr_set_field(host->base + MSDC_PATCH_BIT2,
1720 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);
1896 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY,
1899 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY,
1908 sdr_set_field(host->top_base + EMMC_TOP_CONTROL,
1911 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY,
1929 sdr_set_field(host->base + tune_reg,
1994 sdr_set_field(host->base + tune_reg,
2002 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY,
2020 sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2);
2024 sdr_set_field(host->base + MSDC_PAD_TUNE,
2033 sdr_set_field(host->base + PAD_CMD_TUNE,
2051 sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3,
2067 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,
2122 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,
2230 sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2);
2300 sdr_set_field(host->base + MSDC_DMA_CTRL,