Lines Matching defs:phase
219 * while power-on phase the clock can't be define to 0,
372 int unit, int phase, bool sampler)
379 FIELD_PREP(DLYB_CFGR_SEL_MASK, phase);
423 int phase;
425 for (phase = 0; phase <= dlyb->max; phase++) {
426 sdmmc_dlyb_set_cfgr(dlyb, dlyb->unit, phase, false);
434 end_of_len = phase;
446 phase = end_of_len - max_len / 2;
447 sdmmc_dlyb_set_cfgr(dlyb, dlyb->unit, phase, false);
449 dev_dbg(mmc_dev(host->mmc), "unit:%d max_dly:%d phase:%d\n",
450 dlyb->unit, dlyb->max, phase);