Lines Matching refs:reset
187 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset)
192 ctrl |= reset;
197 !(ctrl & reset),
200 "Timeout resetting block (ctrl reset %#x)\n",
201 ctrl & reset);
447 /* Software reset of DMA */
456 /* Disable and reset the IDMAC interface */
735 /* Make sure to reset DMA in case we did PIO before this */
1475 /* Keep track so we don't reset again */
1585 int reset;
1595 * According to eMMC spec, card reset procedure:
1600 reset = mci_readl(host, RST_N);
1601 reset &= ~(SDMMC_RST_HWACTIVE << slot->id);
1602 mci_writel(host, RST_N, reset);
1604 reset |= SDMMC_RST_HWACTIVE << slot->id;
1605 mci_writel(host, RST_N, reset);
1749 /* when using DMA next we reset the fifo again */
1753 /* if the controller reset bit did clear, then set clock regs */
1756 "%s: fifo/dma reset bits didn't clear but ciu was reset, doing clock update\n",
1769 /* After a CTRL reset we need to have CIU set clock registers */
2125 * never get one since we just reset everything;
3099 /* find reset controller when exist */
3100 pdata->rstc = devm_reset_control_get_optional_exclusive(dev, "reset");