Lines Matching refs:clksel
133 u32 clksel;
137 clksel = mci_readl(host, CLKSEL64);
139 clksel = mci_readl(host, CLKSEL);
141 clksel = (clksel & ~SDMMC_CLKSEL_TIMING_MASK) | timing;
145 mci_writel(host, CLKSEL64, clksel);
147 mci_writel(host, CLKSEL, clksel);
156 if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot)
205 u32 clksel;
214 clksel = mci_readl(host, CLKSEL64);
216 clksel = mci_readl(host, CLKSEL);
218 if (clksel & SDMMC_CLKSEL_WAKEUP_INT) {
221 mci_writel(host, CLKSEL64, clksel);
223 mci_writel(host, CLKSEL, clksel);
300 u32 timing = ios->timing, clksel;
305 clksel = SDMMC_CLKSEL_UP_SAMPLE(
310 clksel = priv->ddr_timing;
317 clksel = (priv->sdr_timing & 0xfff8ffff) |
321 clksel = (priv->ddr_timing & 0xfff8ffff) |
325 clksel = priv->sdr_timing;
329 dw_mci_exynos_set_clksel_timing(host, clksel);
405 u32 clksel;
410 clksel = mci_readl(host, CLKSEL64);
412 clksel = mci_readl(host, CLKSEL);
413 clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
416 mci_writel(host, CLKSEL64, clksel);
418 mci_writel(host, CLKSEL, clksel);
424 u32 clksel;
429 clksel = mci_readl(host, CLKSEL64);
431 clksel = mci_readl(host, CLKSEL);
433 sample = (clksel + 1) & 0x7;
434 clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
438 mci_writel(host, CLKSEL64, clksel);
440 mci_writel(host, CLKSEL, clksel);