Lines Matching defs:host
11 #include <linux/mmc/host.h>
75 static inline u8 dw_mci_exynos_get_ciu_div(struct dw_mci *host)
77 struct dw_mci_exynos_priv_data *priv = host->priv;
85 return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL64)) + 1;
87 return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL)) + 1;
90 static void dw_mci_exynos_config_smu(struct dw_mci *host)
92 struct dw_mci_exynos_priv_data *priv = host->priv;
100 mci_writel(host, MPSBEGIN0, 0);
101 mci_writel(host, MPSEND0, SDMMC_ENDING_SEC_NR_MAX);
102 mci_writel(host, MPSCTRL0, SDMMC_MPSCTRL_SECURE_WRITE_BIT |
109 static int dw_mci_exynos_priv_init(struct dw_mci *host)
111 struct dw_mci_exynos_priv_data *priv = host->priv;
113 dw_mci_exynos_config_smu(host);
116 priv->saved_strobe_ctrl = mci_readl(host, HS400_DLINE_CTRL);
117 priv->saved_dqs_en = mci_readl(host, HS400_DQS_EN);
119 mci_writel(host, HS400_DQS_EN, priv->saved_dqs_en);
125 host->bus_hz /= (priv->ciu_div + 1);
130 static void dw_mci_exynos_set_clksel_timing(struct dw_mci *host, u32 timing)
132 struct dw_mci_exynos_priv_data *priv = host->priv;
137 clksel = mci_readl(host, CLKSEL64);
139 clksel = mci_readl(host, CLKSEL);
145 mci_writel(host, CLKSEL64, clksel);
147 mci_writel(host, CLKSEL, clksel);
156 if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot)
157 set_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags);
163 struct dw_mci *host = dev_get_drvdata(dev);
170 dw_mci_exynos_config_smu(host);
203 struct dw_mci *host = dev_get_drvdata(dev);
204 struct dw_mci_exynos_priv_data *priv = host->priv;
214 clksel = mci_readl(host, CLKSEL64);
216 clksel = mci_readl(host, CLKSEL);
221 mci_writel(host, CLKSEL64, clksel);
223 mci_writel(host, CLKSEL, clksel);
232 static void dw_mci_exynos_config_hs400(struct dw_mci *host, u32 timing)
234 struct dw_mci_exynos_priv_data *priv = host->priv;
243 dev_warn(host->dev,
260 mci_writel(host, HS400_DQS_EN, dqs);
261 mci_writel(host, HS400_DLINE_CTRL, strobe);
264 static void dw_mci_exynos_adjust_clock(struct dw_mci *host, unsigned int wanted)
266 struct dw_mci_exynos_priv_data *priv = host->priv;
274 if (!wanted || IS_ERR(host->ciu_clk))
284 div = dw_mci_exynos_get_ciu_div(host);
285 ret = clk_set_rate(host->ciu_clk, wanted * div);
287 dev_warn(host->dev,
290 actual = clk_get_rate(host->ciu_clk);
291 host->bus_hz = actual / div;
293 host->current_speed = 0;
296 static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios)
298 struct dw_mci_exynos_priv_data *priv = host->priv;
329 dw_mci_exynos_set_clksel_timing(host, clksel);
332 dw_mci_exynos_config_hs400(host, timing);
335 dw_mci_exynos_adjust_clock(host, wanted);
338 static int dw_mci_exynos_parse_dt(struct dw_mci *host)
341 struct device_node *np = host->dev->of_node;
347 priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
383 dev_dbg(host->dev,
388 host->priv = priv;
392 static inline u8 dw_mci_exynos_get_clksmpl(struct dw_mci *host)
394 struct dw_mci_exynos_priv_data *priv = host->priv;
398 return SDMMC_CLKSEL_CCLK_SAMPLE(mci_readl(host, CLKSEL64));
400 return SDMMC_CLKSEL_CCLK_SAMPLE(mci_readl(host, CLKSEL));
403 static inline void dw_mci_exynos_set_clksmpl(struct dw_mci *host, u8 sample)
406 struct dw_mci_exynos_priv_data *priv = host->priv;
410 clksel = mci_readl(host, CLKSEL64);
412 clksel = mci_readl(host, CLKSEL);
416 mci_writel(host, CLKSEL64, clksel);
418 mci_writel(host, CLKSEL, clksel);
421 static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host)
423 struct dw_mci_exynos_priv_data *priv = host->priv;
429 clksel = mci_readl(host, CLKSEL64);
431 clksel = mci_readl(host, CLKSEL);
438 mci_writel(host, CLKSEL64, clksel);
440 mci_writel(host, CLKSEL, clksel);
485 struct dw_mci *host = slot->host;
486 struct dw_mci_exynos_priv_data *priv = host->priv;
492 start_smpl = dw_mci_exynos_get_clksmpl(host);
495 mci_writel(host, TMOUT, ~0);
496 smpl = dw_mci_exynos_move_next_clksmpl(host);
505 dw_mci_exynos_set_clksmpl(host, found);
516 static int dw_mci_exynos_prepare_hs400_tuning(struct dw_mci *host,
519 struct dw_mci_exynos_priv_data *priv = host->priv;
521 dw_mci_exynos_set_clksel_timing(host, priv->hs400_timing);
522 dw_mci_exynos_adjust_clock(host, (ios->clock) << 1);