Lines Matching defs:DAVINCI_MMCCTL
33 #define DAVINCI_MMCCTL 0x00 /* Control Register */
64 /* DAVINCI_MMCCTL definitions */
711 writel((readl(host->base + DAVINCI_MMCCTL) &
713 host->base + DAVINCI_MMCCTL);
718 writel((readl(host->base + DAVINCI_MMCCTL) &
720 host->base + DAVINCI_MMCCTL);
722 writel(readl(host->base + DAVINCI_MMCCTL) |
724 host->base + DAVINCI_MMCCTL);
729 writel(readl(host->base + DAVINCI_MMCCTL) &
731 host->base + DAVINCI_MMCCTL);
733 writel(readl(host->base + DAVINCI_MMCCTL) &
735 host->base + DAVINCI_MMCCTL);
832 temp = readl(host->base + DAVINCI_MMCCTL);
838 writel(temp, host->base + DAVINCI_MMCCTL);