Lines Matching refs:PHN_IRQCTL
32 #define PHN_IRQCTL 0x4c /* irq control in caddr space */
69 iowrite32(0x43, dev->caddr + PHN_IRQCTL);
70 ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
72 iowrite32(0, dev->caddr + PHN_IRQCTL);
73 ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
391 iowrite32(0, pht->caddr + PHN_IRQCTL);
392 ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
443 iowrite32(0, pht->caddr + PHN_IRQCTL);
444 ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
464 iowrite32(0, dev->caddr + PHN_IRQCTL);
465 ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
476 iowrite32(0, dev->caddr + PHN_IRQCTL);