Lines Matching refs:hcsr
140 u32 hcsr;
142 hcsr = mei_hcsr_read(dev) | H_IG;
143 mei_hcsr_set(dev, hcsr);
242 u32 hcsr, reg;
248 hcsr = mei_hcsr_read(dev);
249 hw->hbuf_depth = (hcsr & H_CBD) >> 24;
282 static inline u32 me_intr_src(u32 hcsr)
284 return hcsr & H_CSR_IS_MASK;
289 * using supplied hcsr register value.
292 * @hcsr: supplied hcsr register value
294 static inline void me_intr_disable(struct mei_device *dev, u32 hcsr)
296 hcsr &= ~H_CSR_IE_MASK;
297 mei_hcsr_set(dev, hcsr);
304 * @hcsr: supplied hcsr register value
306 static inline void me_intr_clear(struct mei_device *dev, u32 hcsr)
308 if (me_intr_src(hcsr))
309 mei_hcsr_write(dev, hcsr);
319 u32 hcsr = mei_hcsr_read(dev);
321 me_intr_clear(dev, hcsr);
330 u32 hcsr = mei_hcsr_read(dev);
332 hcsr |= H_CSR_IE_MASK;
333 mei_hcsr_set(dev, hcsr);
343 u32 hcsr = mei_hcsr_read(dev);
345 me_intr_disable(dev, hcsr);
367 u32 hcsr = mei_hcsr_read(dev);
369 hcsr |= H_IG;
370 hcsr &= ~H_RST;
371 mei_hcsr_set(dev, hcsr);
381 u32 hcsr = mei_hcsr_read(dev);
383 hcsr |= H_CSR_IE_MASK | H_IG | H_RDY;
384 mei_hcsr_set(dev, hcsr);
395 u32 hcsr = mei_hcsr_read(dev);
397 return (hcsr & H_RDY) == H_RDY;
478 u32 hcsr;
481 hcsr = mei_hcsr_read(dev);
483 read_ptr = (char) ((hcsr & H_CBRP) >> 8);
484 write_ptr = (char) ((hcsr & H_CBWP) >> 16);
1149 u32 hcsr;
1162 hcsr = mei_hcsr_read(dev);
1168 if ((hcsr & H_RST) == H_RST) {
1169 dev_warn(dev->dev, "H_RST is set = 0x%08X", hcsr);
1170 hcsr &= ~H_RST;
1171 mei_hcsr_set(dev, hcsr);
1172 hcsr = mei_hcsr_read(dev);
1175 hcsr |= H_RST | H_IG | H_CSR_IS_MASK;
1178 hcsr &= ~H_CSR_IE_MASK;
1181 mei_hcsr_write(dev, hcsr);
1187 hcsr = mei_hcsr_read(dev);
1189 if ((hcsr & H_RST) == 0)
1190 dev_warn(dev->dev, "H_RST is not set = 0x%08X", hcsr);
1192 if ((hcsr & H_RDY) == H_RDY)
1193 dev_warn(dev->dev, "H_RDY is not cleared 0x%08X", hcsr);
1217 u32 hcsr;
1219 hcsr = mei_hcsr_read(dev);
1220 if (!me_intr_src(hcsr))
1223 dev_dbg(dev->dev, "interrupt source 0x%08X\n", me_intr_src(hcsr));
1226 me_intr_disable(dev, hcsr);
1245 u32 hcsr;
1252 hcsr = mei_hcsr_read(dev);
1253 me_intr_clear(dev, hcsr);
1267 mei_me_pg_intr(dev, me_intr_src(hcsr));