Lines Matching refs:addr
487 static u64 goya_set_ddr_bar_base(struct hl_device *hdev, u64 addr)
491 u64 old_addr = addr;
494 if ((goya) && (goya->ddr_bar_cur_addr == addr))
500 pci_region.addr = addr;
507 goya->ddr_bar_cur_addr = addr;
530 inbound_region.addr = SRAM_BASE_ADDR;
538 inbound_region.addr = DRAM_PHYS_BASE;
546 outbound_region.addr = HOST_PHYS_BASE;
2467 "failed to set hop0 addr for asid %d\n", i);
2894 fence_pkt->addr = cpu_to_le64(fence_dma_addr);
2979 fence_pkt->addr = cpu_to_le64(fence_dma_addr);
3117 dma_addr_t addr, addr_next;
3124 addr = sg_dma_address(sg);
3137 if ((addr + len == addr_next) &&
3156 u64 addr, enum dma_data_direction dir)
3161 if (hl_userptr_is_pinned(hdev, addr, le32_to_cpu(user_dma_pkt->tsize),
3169 rc = hl_pin_host_memory(hdev, addr, le32_to_cpu(user_dma_pkt->tsize),
3204 u64 device_memory_addr, addr;
3226 addr = le64_to_cpu(user_dma_pkt->src_addr);
3236 addr = le64_to_cpu(user_dma_pkt->dst_addr);
3243 addr = le64_to_cpu(user_dma_pkt->src_addr);
3252 addr = le64_to_cpu(user_dma_pkt->dst_addr);
3297 addr, dir);
3585 u64 device_memory_addr, addr;
3608 addr = le64_to_cpu(user_dma_pkt->src_addr);
3614 addr = le64_to_cpu(user_dma_pkt->dst_addr);
3620 (hl_userptr_is_pinned(hdev, addr,
3624 addr, user_dma_pkt->tsize);
3990 cq_pkt->addr = cpu_to_le64(cq_addr);
3998 cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF);
4036 * @addr: device or host mapped address
4046 static int goya_debugfs_read32(struct hl_device *hdev, u64 addr, u32 *val)
4052 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {
4053 *val = RREG32(addr - CFG_BASE);
4055 } else if ((addr >= SRAM_BASE_ADDR) &&
4056 (addr < SRAM_BASE_ADDR + SRAM_SIZE)) {
4059 (addr - SRAM_BASE_ADDR));
4061 } else if (addr < DRAM_PHYS_BASE + hdev->asic_prop.dram_size) {
4064 (addr & ~(prop->dram_pci_bar_size - 0x1ull));
4069 (addr - bar_base_addr));
4077 } else if (addr >= HOST_PHYS_BASE && !iommu_present(&pci_bus_type)) {
4078 *val = *(u32 *) phys_to_virt(addr - HOST_PHYS_BASE);
4092 * @addr: device or host mapped address
4102 static int goya_debugfs_write32(struct hl_device *hdev, u64 addr, u32 val)
4108 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {
4109 WREG32(addr - CFG_BASE, val);
4111 } else if ((addr >= SRAM_BASE_ADDR) &&
4112 (addr < SRAM_BASE_ADDR + SRAM_SIZE)) {
4115 (addr - SRAM_BASE_ADDR));
4117 } else if (addr < DRAM_PHYS_BASE + hdev->asic_prop.dram_size) {
4120 (addr & ~(prop->dram_pci_bar_size - 0x1ull));
4125 (addr - bar_base_addr));
4133 } else if (addr >= HOST_PHYS_BASE && !iommu_present(&pci_bus_type)) {
4134 *(u32 *) phys_to_virt(addr - HOST_PHYS_BASE) = val;
4143 static int goya_debugfs_read64(struct hl_device *hdev, u64 addr, u64 *val)
4149 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {
4150 u32 val_l = RREG32(addr - CFG_BASE);
4151 u32 val_h = RREG32(addr + sizeof(u32) - CFG_BASE);
4155 } else if ((addr >= SRAM_BASE_ADDR) &&
4156 (addr <= SRAM_BASE_ADDR + SRAM_SIZE - sizeof(u64))) {
4159 (addr - SRAM_BASE_ADDR));
4161 } else if (addr <=
4165 (addr & ~(prop->dram_pci_bar_size - 0x1ull));
4170 (addr - bar_base_addr));
4178 } else if (addr >= HOST_PHYS_BASE && !iommu_present(&pci_bus_type)) {
4179 *val = *(u64 *) phys_to_virt(addr - HOST_PHYS_BASE);
4188 static int goya_debugfs_write64(struct hl_device *hdev, u64 addr, u64 val)
4194 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {
4195 WREG32(addr - CFG_BASE, lower_32_bits(val));
4196 WREG32(addr + sizeof(u32) - CFG_BASE, upper_32_bits(val));
4198 } else if ((addr >= SRAM_BASE_ADDR) &&
4199 (addr <= SRAM_BASE_ADDR + SRAM_SIZE - sizeof(u64))) {
4202 (addr - SRAM_BASE_ADDR));
4204 } else if (addr <=
4208 (addr & ~(prop->dram_pci_bar_size - 0x1ull));
4213 (addr - bar_base_addr));
4221 } else if (addr >= HOST_PHYS_BASE && !iommu_present(&pci_bus_type)) {
4222 *(u64 *) phys_to_virt(addr - HOST_PHYS_BASE) = val;
4231 static u64 goya_read_pte(struct hl_device *hdev, u64 addr)
4239 (addr - goya->ddr_bar_cur_addr));
4242 static void goya_write_pte(struct hl_device *hdev, u64 addr, u64 val)
4250 (addr - goya->ddr_bar_cur_addr));
4472 u64 addr;
4480 addr = val & MMU_PAGE_ERROR_CAPTURE_VA_49_32_MASK;
4481 addr <<= 32;
4482 addr |= RREG32(mmMMU_PAGE_ERROR_CAPTURE_VA);
4485 addr);
4737 static int goya_memset_device_memory(struct hl_device *hdev, u64 addr, u64 size,
4768 lin_dma_pkt->dst_addr = cpu_to_le64(addr);
4775 addr += SZ_2G;
4812 u64 addr = prop->sram_base_address, sob_addr;
4819 rc = goya_memset_device_memory(hdev, addr, size, val, false);
4849 u64 addr = prop->mmu_pgt_addr;
4856 return goya_memset_device_memory(hdev, addr, size, 0, true);
4862 u64 addr = hdev->asic_prop.mmu_dram_default_page_addr;
4869 return goya_memset_device_memory(hdev, addr, size, val, true);