Lines Matching refs:qman_offset
2551 u32 qman_offset;
2561 for (i = GAUDI_PCI_DMA_1, qman_offset = 0 ; i < GAUDI_HBM_DMA_1 ; i++) {
2565 qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
2566 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset,
2568 WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
2576 qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
2577 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset,
2579 WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
2591 for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {
2595 WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset,
2597 WREG32(mmTPC0_QM_CGM_CFG + qman_offset,
2600 qman_offset += TPC_QMAN_OFFSET;
2609 u32 qman_offset;
2615 for (i = 0, qman_offset = 0 ; i < DMA_NUMBER_OF_CHANNELS ; i++) {
2616 WREG32(mmDMA0_QM_CGM_CFG + qman_offset, 0);
2617 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, 0);
2619 qman_offset += (mmDMA1_QM_CGM_CFG - mmDMA0_QM_CGM_CFG);
2627 for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {
2628 WREG32(mmTPC0_QM_CGM_CFG + qman_offset, 0);
2629 WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset, 0);
2631 qman_offset += (mmTPC1_QM_CGM_CFG - mmTPC0_QM_CGM_CFG);
4470 u32 qman_offset;
4474 qman_offset = i * DMA_QMAN_OFFSET;
4475 WREG32(mmDMA0_QM_ARB_CFG_0 + qman_offset, 0);
4479 qman_offset = i * (mmMME2_QM_BASE - mmMME0_QM_BASE);
4480 WREG32(mmMME0_QM_ARB_CFG_0 + qman_offset, 0);
4484 qman_offset = i * TPC_QMAN_OFFSET;
4485 WREG32(mmTPC0_QM_ARB_CFG_0 + qman_offset, 0);