Lines Matching defs:enable
808 dev_err(hdev->dev, "Failed to enable PCI access from CPU\n");
1184 dev_err(hdev->dev, "MSI: Failed to enable support %d\n", rc);
2552 bool enable;
2555 /* In case we are during debug session, don't enable the clock gate
2562 enable = !!(hdev->clock_gating_mask &
2567 enable ? QMAN_CGM1_PWR_GATE_EN : 0);
2569 enable ? QMAN_UPPER_CP_CGM_PWR_GATE_EN : 0);
2573 enable = !!(hdev->clock_gating_mask &
2578 enable ? QMAN_CGM1_PWR_GATE_EN : 0);
2580 enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
2583 enable = !!(hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_0)));
2584 WREG32(mmMME0_QM_CGM_CFG1, enable ? QMAN_CGM1_PWR_GATE_EN : 0);
2585 WREG32(mmMME0_QM_CGM_CFG, enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
2587 enable = !!(hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_2)));
2588 WREG32(mmMME2_QM_CGM_CFG1, enable ? QMAN_CGM1_PWR_GATE_EN : 0);
2589 WREG32(mmMME2_QM_CGM_CFG, enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
2592 enable = !!(hdev->clock_gating_mask &
2596 enable ? QMAN_CGM1_PWR_GATE_EN : 0);
2598 enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);