Lines Matching refs:edev
52 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
54 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
57 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
59 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
62 static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev)
64 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE;
70 struct eeprom_93xx46_dev *edev = priv;
74 if (unlikely(off >= edev->size))
76 if ((off + count) > edev->size)
77 count = edev->size - off;
81 mutex_lock(&edev->lock);
83 if (edev->pdata->prepare)
84 edev->pdata->prepare(edev);
89 u16 cmd_addr = OP_READ << edev->addrlen;
93 if (edev->addrlen == 7) {
96 if (has_quirk_single_word_read(edev))
101 if (has_quirk_single_word_read(edev))
105 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
106 cmd_addr, edev->spi->max_speed_hz);
108 if (has_quirk_extra_read_cycle(edev)) {
125 err = spi_sync(edev->spi, &m);
130 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
140 if (edev->pdata->finish)
141 edev->pdata->finish(edev);
143 mutex_unlock(&edev->lock);
148 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
155 cmd_addr = OP_START << edev->addrlen;
156 if (edev->addrlen == 7) {
164 if (has_quirk_instruction_length(edev)) {
169 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
180 mutex_lock(&edev->lock);
182 if (edev->pdata->prepare)
183 edev->pdata->prepare(edev);
185 ret = spi_sync(edev->spi, &m);
189 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
192 if (edev->pdata->finish)
193 edev->pdata->finish(edev);
195 mutex_unlock(&edev->lock);
200 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
208 cmd_addr = OP_WRITE << edev->addrlen;
210 if (edev->addrlen == 7) {
220 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
235 ret = spi_sync(edev->spi, &m);
244 struct eeprom_93xx46_dev *edev = priv;
248 if (unlikely(off >= edev->size))
250 if ((off + count) > edev->size)
251 count = edev->size - off;
256 if (edev->addrlen == 6) {
262 ret = eeprom_93xx46_ew(edev, 1);
266 mutex_lock(&edev->lock);
268 if (edev->pdata->prepare)
269 edev->pdata->prepare(edev);
272 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
274 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
280 if (edev->pdata->finish)
281 edev->pdata->finish(edev);
283 mutex_unlock(&edev->lock);
286 eeprom_93xx46_ew(edev, 0);
290 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
292 struct eeprom_93xx46_platform_data *pd = edev->pdata;
298 cmd_addr = OP_START << edev->addrlen;
299 if (edev->addrlen == 7) {
307 if (has_quirk_instruction_length(edev)) {
312 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
322 mutex_lock(&edev->lock);
324 if (edev->pdata->prepare)
325 edev->pdata->prepare(edev);
327 ret = spi_sync(edev->spi, &m);
329 dev_err(&edev->spi->dev, "erase error %d\n", ret);
334 pd->finish(edev);
336 mutex_unlock(&edev->lock);
344 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
349 ret = eeprom_93xx46_ew(edev, 1);
352 ret = eeprom_93xx46_eral(edev);
355 ret = eeprom_93xx46_ew(edev, 0);
365 struct eeprom_93xx46_dev *edev = context;
367 gpiod_set_value_cansleep(edev->pdata->select, 1);
372 struct eeprom_93xx46_dev *edev = context;
374 gpiod_set_value_cansleep(edev->pdata->select, 0);
439 struct eeprom_93xx46_dev *edev;
454 edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
455 if (!edev)
459 edev->addrlen = 7;
461 edev->addrlen = 6;
467 mutex_init(&edev->lock);
469 edev->spi = spi;
470 edev->pdata = pd;
472 edev->size = 128;
473 edev->nvmem_config.type = NVMEM_TYPE_EEPROM;
474 edev->nvmem_config.name = dev_name(&spi->dev);
475 edev->nvmem_config.dev = &spi->dev;
476 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
477 edev->nvmem_config.root_only = true;
478 edev->nvmem_config.owner = THIS_MODULE;
479 edev->nvmem_config.compat = true;
480 edev->nvmem_config.base_dev = &spi->dev;
481 edev->nvmem_config.reg_read = eeprom_93xx46_read;
482 edev->nvmem_config.reg_write = eeprom_93xx46_write;
483 edev->nvmem_config.priv = edev;
484 edev->nvmem_config.stride = 4;
485 edev->nvmem_config.word_size = 1;
486 edev->nvmem_config.size = edev->size;
488 edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
489 if (IS_ERR(edev->nvmem))
490 return PTR_ERR(edev->nvmem);
501 spi_set_drvdata(spi, edev);
507 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
509 if (!(edev->pdata->flags & EE_READONLY))