Lines Matching defs:timer
44 int cs5535_mfgpt_toggle_event(struct cs5535_mfgpt_timer *timer, int cmp,
50 if (!timer) {
67 mask = 1 << (timer->nr + 24);
72 mask = 1 << (timer->nr + shift);
77 mask = 1 << (timer->nr + shift);
96 int cs5535_mfgpt_set_irq(struct cs5535_mfgpt_timer *timer, int cmp, int *irq,
102 if (!timer) {
109 * is using the same CMP of the timer's Siamese twin, the IRQ is set to
116 shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer->nr % 4) * 4;
134 if (cs5535_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
148 struct cs5535_mfgpt_timer *timer = NULL;
171 /* try to find any available timer */
176 /* check if the requested timer's available */
182 /* if timer_nr is not -1, it's an available timer */
189 timer = kmalloc(sizeof(*timer), GFP_KERNEL);
190 if (!timer) {
197 timer->chip = mfgpt;
198 timer->nr = timer_nr;
199 dev_info(&mfgpt->pdev->dev, "registered timer %d\n", timer_nr);
202 return timer;
207 * XXX: This frees the timer memory, but never resets the actual hardware
208 * timer. The old geode_mfgpt code did this; it would be good to figure
209 * out a way to actually release the hardware timer. See comments below.
211 void cs5535_mfgpt_free_timer(struct cs5535_mfgpt_timer *timer)
216 /* timer can be made available again only if never set up */
217 val = cs5535_mfgpt_read(timer, MFGPT_REG_SETUP);
219 spin_lock_irqsave(&timer->chip->lock, flags);
220 __set_bit(timer->nr, timer->chip->avail);
221 spin_unlock_irqrestore(&timer->chip->lock, flags);
224 kfree(timer);
228 uint16_t cs5535_mfgpt_read(struct cs5535_mfgpt_timer *timer, uint16_t reg)
230 return inw(timer->chip->base + reg + (timer->nr * 8));
234 void cs5535_mfgpt_write(struct cs5535_mfgpt_timer *timer, uint16_t reg,
237 outw(value, timer->chip->base + reg + (timer->nr * 8));
289 struct cs5535_mfgpt_timer timer = { .chip = mfgpt };
304 timer.nr = i;
305 val = cs5535_mfgpt_read(&timer, MFGPT_REG_SETUP);
378 MODULE_DESCRIPTION("CS5535/CS5536 MFGPT timer driver");